| Message ID | 20240102-j7200-pcie-s2r-v3-0-5c2e4a3fac1f@bootlin.com |
|---|---|
| Headers | show |
| Series | Add suspend to ram support for PCIe on J7200 | expand |
On Thu, Feb 15, 2024 at 04:17:52PM +0100, Thomas Richard wrote: > Use dev_err_probe() instead of dev_err() in wiz_clock_init() to simplify > the code and standardize the error output. ... > ret = wiz_clock_register(wiz); > if (ret) > - dev_err(dev, "Failed to register wiz clocks\n"); > + dev_err_probe(dev, ret, "Failed to register wiz clocks\n"); > return ret; Maybe if (ret) return dev_err_probe(dev, ret, "Failed to register wiz clocks\n"); return 0; ? ... > if (!clk_node) { > - dev_err(dev, "Unable to get %s node\n", node_name); > ret = -EINVAL; > + dev_err_probe(dev, ret, "Unable to get %s node\n", node_name); > goto err; ret = dev_err_probe(..., -EINVAL, ...); > }
On Thu, 2024-02-15 at 16:17 +0100, Thomas Richard wrote: > This add suspend to ram support for the PCIe (RC mode) on J7200 > platform. > > In RC mode, the reset pin for endpoints is managed by a gpio expander > on a > i2c bus. This pin shall be managed in suspend_noirq() and > resume_noirq(). > The suspend/resume has been moved to suspend_noirq()/resume_noirq() > for > pca953x (expander) and pinctrl-single. > > To do i2c accesses during suspend_noirq/resume_noirq, we need to > force the > wakeup of the i2c controller (which is autosuspended) during suspend > callback. > It's the only way to wakeup the controller if it's autosuspended, as > runtime pm is disabled in suspend_noirq and resume_noirq. > > The main change in this v3 is the removal of the probe boolean for > the > functions wiz_clock_probe() and cdns_pcie_host_setup(). > Their contents were split in multiple functions which are called in > the > resume_noirq() callbacks. > > Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> > --- > Changes in v3: > - pinctrl-single: split patch in two parts, a first patch to remove > the > dead code, a second to move suspend()/resume() callbacks to noirq. > - i2c-omap: add a comments above the suspend_noirq() callback. > - mux: now mux_chip_resume() try to restores all muxes, then return 0 > if > all is ok or the first failure. > - mmio: fix commit message. > - phy-j721e-wiz: add a patch to use dev_err_probe() instead of > dev_err() in > the wiz_clock_init() function. > - phy-j721e-wiz: remove probe boolean for the wiz_clock_init(), > rename the > function to wiz_clock_probe(), extract hardware configuration part > in a > new function wiz_clock_init(). > - phy-cadence-torrent: use dev_err_probe() and fix commit messages > - pcie-cadence-host: remove probe boolean for the > cdns_pcie_host_setup() > function and extract the link setup part in a new function > cdns_pcie_host_link_setup(). > - pcie-cadence-host: make cdns_pcie_host_init() global. > - pci-j721e: use the cdns_pcie_host_link_setup() > cdns_pcie_host_init() > functions in the resume_noirq() callback. > - Link to v2: > https://lore.kernel.org/r/20240102-j7200-pcie-s2r-v2-0-8e4f7d228ec2@bootlin.com > > Changes in v2: > - all: fix commits messages. > - all: use DEFINE_NOIRQ_DEV_PM_OPS and pm_sleep_ptr macros. > - all: remove useless #ifdef CONFIG_PM. > - pinctrl-single: drop dead code > - mux: add mux_chip_resume() function in mux core. > - mmio: resume sequence is now a call to mux_chip_resume(). > - phy-cadence-torrent: fix typo in resume sequence > (reset_control_assert() > instead of reset_control_put()). > - phy-cadence-torrent: use PHY instead of phy. > - pci-j721e: do not shadow cdns_pcie_host_setup return code in resume > sequence. > - pci-j721e: drop dead code. > - Link to v1: > https://lore.kernel.org/r/20240102-j7200-pcie-s2r-v1-0-84e55da52400@bootlin.com > > --- > Thomas Richard (15): > gpio: pca953x: move suspend()/resume() to > suspend_noirq()/resume_noirq() > pinctrl: pinctrl-single: remove dead code in suspend() and > resume() callbacks > pinctrl: pinctrl-single: move suspend()/resume() callbacks to > noirq > i2c: omap: wakeup the controller during suspend() callback > mux: add mux_chip_resume() function > phy: ti: phy-j721e-wiz: use dev_err_probe() instead of > dev_err() > phy: ti: phy-j721e-wiz: split wiz_clock_init() function > phy: ti: phy-j721e-wiz: add resume support > phy: cadence-torrent: extract calls to clk_get from > cdns_torrent_clk > phy: cadence-torrent: register resets even if the phy is > already configured > phy: cadence-torrent: add already_configured to struct > cdns_torrent_phy > phy: cadence-torrent: remove noop_ops phy operations > phy: cadence-torrent: add suspend and resume support > PCI: cadence: extract link setup sequence from > cdns_pcie_host_setup() > PCI: cadence: set cdns_pcie_host_init() global > > Théo Lebrun (3): > mux: mmio: add resume support > PCI: j721e: add reset GPIO to struct j721e_pcie > PCI: j721e: add suspend and resume support For the PCI patches Bjorn is most likely going to ask you to adjust them to PCI's common commit style; see here [1] In particular, PCI (afaik) has no convention for naming subcomponents such as j721e and the info following the : is written beginning with an upper case, e.g. PCI: Add suspend and resume support for j721e Regards, P. [1] https://lore.kernel.org/linux-pci/20171026223701.GA25649@bhelgaas-glaptop.roam.corp.google.com/ > > drivers/gpio/gpio-pca953x.c | 7 +- > drivers/i2c/busses/i2c-omap.c | 22 ++++ > drivers/mux/core.c | 30 +++++ > drivers/mux/mmio.c | 12 ++ > drivers/pci/controller/cadence/pci-j721e.c | 102 > ++++++++++++++++- > drivers/pci/controller/cadence/pcie-cadence-host.c | 44 +++++--- > drivers/pci/controller/cadence/pcie-cadence.h | 12 ++ > drivers/phy/cadence/phy-cadence-torrent.c | 121 > +++++++++++++++------ > drivers/phy/ti/phy-j721e-wiz.c | 119 > +++++++++++++------- > drivers/pinctrl/pinctrl-single.c | 28 ++--- > include/linux/mux/driver.h | 1 + > 11 files changed, 380 insertions(+), 118 deletions(-) > --- > base-commit: 00ff0f9ce40db8e64fe16c424a965fd7ab769c42 > change-id: 20240102-j7200-pcie-s2r-ecb1a979e357 > > Best regards,
On Thu, Feb 15, 2024 at 04:17:58PM +0100, Thomas Richard wrote: > Even if a PHY is already configured, the PHY operations are needed during > resume stage, as the PHY is in reset state. > The noop_ops PHY operations is removed to always have PHY operations. > The already_configured flag is checked at the begening of init, configure > and poweron operations to keep the already_configured behaviour. ... > + if (cdns_phy->already_configured) { > + /* Give 5ms to 10ms delay for the PIPE clock to be stable */ > + usleep_range(5000, 10000); fsleep() ? (Yes, I see this is the original code, perhaps later in a separate change) > + return 0; > + }
On Thu, Feb 15, 2024 at 04:18:03PM +0100, Thomas Richard wrote: > From: Théo Lebrun <theo.lebrun@bootlin.com> > > Add suspend and resume support. Only the rc mode is supported. > > During the suspend stage PERST# is asserted, then deasserted during the > resume stage. ... > +#include <linux/clk-provider.h> > #include <linux/clk.h> > #include <linux/delay.h> > #include <linux/gpio/consumer.h> > @@ -18,10 +19,13 @@ > #include <linux/platform_device.h> > #include <linux/pm_runtime.h> > #include <linux/regmap.h> > +#include <linux/container_of.h> Unordered. ... > + ret = j721e_pcie_ctrl_init(pcie); > + if (ret < 0) { > + dev_err(dev, "j721e_pcie_ctrl_init failed\n"); Is there any guarantee this won't spam logs? > + return ret; > + } ... > + /* > + * This is not called explicitly in the probe, it is called by > + * cdns_pcie_init_phy. cdns_pcie_init_phy() > + */ > + ret = cdns_pcie_enable_phy(pcie->cdns_pcie); > + if (ret < 0) { > + dev_err(dev, "cdns_pcie_enable_phy failed\n"); > + return -ENODEV; A potential log spammer? > + } > + if (pcie->mode == PCI_MODE_RC) { > + struct cdns_pcie_rc *rc = cdns_pcie_to_rc(cdns_pcie); > + > + ret = clk_prepare_enable(pcie->refclk); > + if (ret < 0) { > + dev_err(dev, "clk_prepare_enable failed\n"); Ditto. > + return -ENODEV; Why is the error code shadowed? > + } ... > + if (pcie->reset_gpio) { > + usleep_range(100, 200); fsleep() > + gpiod_set_value_cansleep(pcie->reset_gpio, 1); > + } > + ret = cdns_pcie_host_link_setup(rc); > + if (ret < 0) { > + clk_disable_unprepare(pcie->refclk); > + return ret; > + } > + > + /* > + * Reset internal status of BARs to force reinitialization in > + * cdns_pcie_host_init(). > + */ > + for (enum cdns_pcie_rp_bar bar = RP_BAR0; bar <= RP_NO_BAR; bar++) > + rc->avail_ib_bar[bar] = true; > + > + ret = cdns_pcie_host_init(rc); > + if (ret) No clock disabling? > + return ret; > + }
On Thu, Feb 15, 2024 at 04:18:02PM +0100, Thomas Richard wrote: > From: Théo Lebrun <theo.lebrun@bootlin.com> > > Add reset GPIO to struct j721e_pcie, so it can be used at suspend and > resume stages. ... > case PCI_MODE_RC: > - gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); > - if (IS_ERR(gpiod)) { > - ret = PTR_ERR(gpiod); > + pcie->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); > + if (IS_ERR(pcie->reset_gpio)) { > + ret = PTR_ERR(pcie->reset_gpio); > if (ret != -EPROBE_DEFER) > dev_err(dev, "Failed to get reset GPIO\n"); > goto err_get_sync; > @@ -504,9 +504,9 @@ static int j721e_pcie_probe(struct platform_device *pdev) > * mode is selected while enabling the PHY. So deassert PERST# > * after 100 us. > */ > - if (gpiod) { > + if (pcie->reset_gpio) { > usleep_range(100, 200); > - gpiod_set_value_cansleep(gpiod, 1); > + gpiod_set_value_cansleep(pcie->reset_gpio, 1); > } Instead of all this, just add one line assignment. Moreover, before or after this patch refactor the code to use ret = dev_err_probe(...); pattern that eliminates those deferral probe checks.
On Thu, Feb 15, 2024 at 04:17:45PM +0100, Thomas Richard wrote: > This add suspend to ram support for the PCIe (RC mode) on J7200 platform. > PCI: cadence: extract link setup sequence from cdns_pcie_host_setup() > PCI: cadence: set cdns_pcie_host_init() global > PCI: j721e: add reset GPIO to struct j721e_pcie > PCI: j721e: add suspend and resume support The drivers/pci/ subject line pattern is: PCI: <driver>: <Capitalized verb> e.g., PCI: cadence: Extract link setup sequence from cdns_pcie_host_setup()
On 2/15/24 17:04, Andy Shevchenko wrote: > On Thu, Feb 15, 2024 at 04:18:02PM +0100, Thomas Richard wrote: >> From: Théo Lebrun <theo.lebrun@bootlin.com> >> >> Add reset GPIO to struct j721e_pcie, so it can be used at suspend and >> resume stages. > > ... > >> case PCI_MODE_RC: >> - gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); >> - if (IS_ERR(gpiod)) { >> - ret = PTR_ERR(gpiod); >> + pcie->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); >> + if (IS_ERR(pcie->reset_gpio)) { >> + ret = PTR_ERR(pcie->reset_gpio); >> if (ret != -EPROBE_DEFER) >> dev_err(dev, "Failed to get reset GPIO\n"); >> goto err_get_sync; >> @@ -504,9 +504,9 @@ static int j721e_pcie_probe(struct platform_device *pdev) >> * mode is selected while enabling the PHY. So deassert PERST# >> * after 100 us. >> */ >> - if (gpiod) { >> + if (pcie->reset_gpio) { >> usleep_range(100, 200); >> - gpiod_set_value_cansleep(gpiod, 1); >> + gpiod_set_value_cansleep(pcie->reset_gpio, 1); >> } > > Instead of all this, just add one line assignment. Moreover, before or after > this patch refactor the code to use ret = dev_err_probe(...); pattern that > eliminates those deferral probe checks. Hi Andy, I'm not sure what you exactly want when you write "just add one line assignment". For the dev_err_probe() it's okay, it will be fixed in the next iteration. Regards,
On Mon, Feb 26, 2024 at 06:05:16PM +0100, Thomas Richard wrote: > On 2/15/24 17:04, Andy Shevchenko wrote: > > On Thu, Feb 15, 2024 at 04:18:02PM +0100, Thomas Richard wrote: > >> From: Théo Lebrun <theo.lebrun@bootlin.com> ... > >> case PCI_MODE_RC: > >> - gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); > >> - if (IS_ERR(gpiod)) { > >> - ret = PTR_ERR(gpiod); > >> + pcie->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); > >> + if (IS_ERR(pcie->reset_gpio)) { > >> + ret = PTR_ERR(pcie->reset_gpio); > >> if (ret != -EPROBE_DEFER) > >> dev_err(dev, "Failed to get reset GPIO\n"); > >> goto err_get_sync; > >> @@ -504,9 +504,9 @@ static int j721e_pcie_probe(struct platform_device *pdev) > >> * mode is selected while enabling the PHY. So deassert PERST# > >> * after 100 us. > >> */ > >> - if (gpiod) { > >> + if (pcie->reset_gpio) { > >> usleep_range(100, 200); > >> - gpiod_set_value_cansleep(gpiod, 1); > >> + gpiod_set_value_cansleep(pcie->reset_gpio, 1); > >> } > > > > Instead of all this, just add one line assignment. Moreover, before or after > > this patch refactor the code to use ret = dev_err_probe(...); pattern that > > eliminates those deferral probe checks. > > Hi Andy, > > I'm not sure what you exactly want when you write "just add one line > assignment". pcie->reset_gpio = gpiod; That's it. No additional code changes are needed (WRT the above context, of course you want to have a new structure member).
This add suspend to ram support for the PCIe (RC mode) on J7200 platform. In RC mode, the reset pin for endpoints is managed by a gpio expander on a i2c bus. This pin shall be managed in suspend_noirq() and resume_noirq(). The suspend/resume has been moved to suspend_noirq()/resume_noirq() for pca953x (expander) and pinctrl-single. To do i2c accesses during suspend_noirq/resume_noirq, we need to force the wakeup of the i2c controller (which is autosuspended) during suspend callback. It's the only way to wakeup the controller if it's autosuspended, as runtime pm is disabled in suspend_noirq and resume_noirq. The main change in this v3 is the removal of the probe boolean for the functions wiz_clock_probe() and cdns_pcie_host_setup(). Their contents were split in multiple functions which are called in the resume_noirq() callbacks. Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> --- Changes in v3: - pinctrl-single: split patch in two parts, a first patch to remove the dead code, a second to move suspend()/resume() callbacks to noirq. - i2c-omap: add a comments above the suspend_noirq() callback. - mux: now mux_chip_resume() try to restores all muxes, then return 0 if all is ok or the first failure. - mmio: fix commit message. - phy-j721e-wiz: add a patch to use dev_err_probe() instead of dev_err() in the wiz_clock_init() function. - phy-j721e-wiz: remove probe boolean for the wiz_clock_init(), rename the function to wiz_clock_probe(), extract hardware configuration part in a new function wiz_clock_init(). - phy-cadence-torrent: use dev_err_probe() and fix commit messages - pcie-cadence-host: remove probe boolean for the cdns_pcie_host_setup() function and extract the link setup part in a new function cdns_pcie_host_link_setup(). - pcie-cadence-host: make cdns_pcie_host_init() global. - pci-j721e: use the cdns_pcie_host_link_setup() cdns_pcie_host_init() functions in the resume_noirq() callback. - Link to v2: https://lore.kernel.org/r/20240102-j7200-pcie-s2r-v2-0-8e4f7d228ec2@bootlin.com Changes in v2: - all: fix commits messages. - all: use DEFINE_NOIRQ_DEV_PM_OPS and pm_sleep_ptr macros. - all: remove useless #ifdef CONFIG_PM. - pinctrl-single: drop dead code - mux: add mux_chip_resume() function in mux core. - mmio: resume sequence is now a call to mux_chip_resume(). - phy-cadence-torrent: fix typo in resume sequence (reset_control_assert() instead of reset_control_put()). - phy-cadence-torrent: use PHY instead of phy. - pci-j721e: do not shadow cdns_pcie_host_setup return code in resume sequence. - pci-j721e: drop dead code. - Link to v1: https://lore.kernel.org/r/20240102-j7200-pcie-s2r-v1-0-84e55da52400@bootlin.com --- Thomas Richard (15): gpio: pca953x: move suspend()/resume() to suspend_noirq()/resume_noirq() pinctrl: pinctrl-single: remove dead code in suspend() and resume() callbacks pinctrl: pinctrl-single: move suspend()/resume() callbacks to noirq i2c: omap: wakeup the controller during suspend() callback mux: add mux_chip_resume() function phy: ti: phy-j721e-wiz: use dev_err_probe() instead of dev_err() phy: ti: phy-j721e-wiz: split wiz_clock_init() function phy: ti: phy-j721e-wiz: add resume support phy: cadence-torrent: extract calls to clk_get from cdns_torrent_clk phy: cadence-torrent: register resets even if the phy is already configured phy: cadence-torrent: add already_configured to struct cdns_torrent_phy phy: cadence-torrent: remove noop_ops phy operations phy: cadence-torrent: add suspend and resume support PCI: cadence: extract link setup sequence from cdns_pcie_host_setup() PCI: cadence: set cdns_pcie_host_init() global Théo Lebrun (3): mux: mmio: add resume support PCI: j721e: add reset GPIO to struct j721e_pcie PCI: j721e: add suspend and resume support drivers/gpio/gpio-pca953x.c | 7 +- drivers/i2c/busses/i2c-omap.c | 22 ++++ drivers/mux/core.c | 30 +++++ drivers/mux/mmio.c | 12 ++ drivers/pci/controller/cadence/pci-j721e.c | 102 ++++++++++++++++- drivers/pci/controller/cadence/pcie-cadence-host.c | 44 +++++--- drivers/pci/controller/cadence/pcie-cadence.h | 12 ++ drivers/phy/cadence/phy-cadence-torrent.c | 121 +++++++++++++++------ drivers/phy/ti/phy-j721e-wiz.c | 119 +++++++++++++------- drivers/pinctrl/pinctrl-single.c | 28 ++--- include/linux/mux/driver.h | 1 + 11 files changed, 380 insertions(+), 118 deletions(-) --- base-commit: 00ff0f9ce40db8e64fe16c424a965fd7ab769c42 change-id: 20240102-j7200-pcie-s2r-ecb1a979e357 Best regards,