Message ID | 20240227223305.910452-6-niklas.soderlund+renesas@ragnatech.se (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | ravb: Align Rx descriptor setup and maintenance | expand |
On 27/02/2024 22:33, Niklas Söderlund wrote: > To make it possible to merge the R-Car and RZ/G2L code paths move the > maximum usable size of a single Rx descriptor data slice in to the > hardware information instead of using two different defines in the two > different code paths. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > * Changes since v1 > - Use SZ_2K macro instead of 2048 directly to align the style of the > rest of the members in struct ravb_hw_info. > --- > drivers/net/ethernet/renesas/ravb.h | 5 +---- > drivers/net/ethernet/renesas/ravb_main.c | 12 ++++++++---- > 2 files changed, 9 insertions(+), 8 deletions(-) > > diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h > index 7fa60fccb6ea..b12b379baf5a 100644 > --- a/drivers/net/ethernet/renesas/ravb.h > +++ b/drivers/net/ethernet/renesas/ravb.h > @@ -1015,10 +1015,6 @@ enum CSR2_BIT { > #define NUM_RX_QUEUE 2 > #define NUM_TX_QUEUE 2 > > -#define RX_BUF_SZ (2048 - ETH_FCS_LEN + sizeof(__sum16)) > - > -#define GBETH_RX_DESC_DATA_SIZE 4080 > - > struct ravb_tstamp_skb { > struct list_head list; > struct sk_buff *skb; > @@ -1058,6 +1054,7 @@ struct ravb_hw_info { > int stats_len; > u32 tccr_mask; > u32 rx_max_frame_size; > + u32 rx_max_desc_use; > unsigned aligned_tx: 1; > > /* hardware features */ > diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c > index 45383635e8e2..4ef4be9e152e 100644 > --- a/drivers/net/ethernet/renesas/ravb_main.c > +++ b/drivers/net/ethernet/renesas/ravb_main.c > @@ -351,7 +351,7 @@ static void ravb_rx_ring_format_gbeth(struct net_device *ndev, int q) > for (i = 0; i < priv->num_rx_ring[q]; i++) { > /* RX descriptor */ > rx_desc = &priv->rx_ring[q].desc[i]; > - rx_desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE); > + rx_desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use); > dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data, > priv->info->rx_max_frame_size, > DMA_FROM_DEVICE); > @@ -381,7 +381,7 @@ static void ravb_rx_ring_format_rcar(struct net_device *ndev, int q) > for (i = 0; i < priv->num_rx_ring[q]; i++) { > /* RX descriptor */ > rx_desc = &priv->rx_ring[q].ex_desc[i]; > - rx_desc->ds_cc = cpu_to_le16(RX_BUF_SZ); > + rx_desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use); > dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data, > priv->info->rx_max_frame_size, > DMA_FROM_DEVICE); > @@ -921,7 +921,7 @@ static bool ravb_rx_gbeth(struct net_device *ndev, int *quota, int q) > for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) { > entry = priv->dirty_rx[q] % priv->num_rx_ring[q]; > desc = &priv->rx_ring[q].desc[entry]; > - desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE); > + desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use); > > if (!priv->rx_skb[q][entry]) { > skb = ravb_alloc_skb(ndev, info, GFP_ATOMIC); > @@ -1036,7 +1036,7 @@ static bool ravb_rx_rcar(struct net_device *ndev, int *quota, int q) > for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) { > entry = priv->dirty_rx[q] % priv->num_rx_ring[q]; > desc = &priv->rx_ring[q].ex_desc[entry]; > - desc->ds_cc = cpu_to_le16(RX_BUF_SZ); > + desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use); > > if (!priv->rx_skb[q][entry]) { > skb = ravb_alloc_skb(ndev, info, GFP_ATOMIC); > @@ -2694,6 +2694,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = { > .stats_len = ARRAY_SIZE(ravb_gstrings_stats), > .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, > .rx_max_frame_size = SZ_2K, > + .rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16), > .internal_delay = 1, > .tx_counters = 1, > .multi_irqs = 1, > @@ -2719,6 +2720,7 @@ static const struct ravb_hw_info ravb_gen2_hw_info = { > .stats_len = ARRAY_SIZE(ravb_gstrings_stats), > .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, > .rx_max_frame_size = SZ_2K, > + .rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16), > .aligned_tx = 1, > .gptp = 1, > .nc_queues = 1, > @@ -2741,6 +2743,7 @@ static const struct ravb_hw_info ravb_rzv2m_hw_info = { > .stats_len = ARRAY_SIZE(ravb_gstrings_stats), > .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, > .rx_max_frame_size = SZ_2K, > + .rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16), > .multi_irqs = 1, > .err_mgmt_irqs = 1, > .gptp = 1, > @@ -2765,6 +2768,7 @@ static const struct ravb_hw_info gbeth_hw_info = { > .stats_len = ARRAY_SIZE(ravb_gstrings_stats_gbeth), > .tccr_mask = TCCR_TSRQ0, > .rx_max_frame_size = SZ_8K, > + .rx_max_desc_use = 4080, > .aligned_tx = 1, > .tx_counters = 1, > .carrier_counters = 1, Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
On 2/28/24 1:33 AM, Niklas Söderlund wrote: > To make it possible to merge the R-Car and RZ/G2L code paths move the > maximum usable size of a single Rx descriptor data slice in to the Into? > hardware information instead of using two different defines in the two > different code paths. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> [...] > diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h > index 7fa60fccb6ea..b12b379baf5a 100644 > --- a/drivers/net/ethernet/renesas/ravb.h > +++ b/drivers/net/ethernet/renesas/ravb.h [...] > @@ -1058,6 +1054,7 @@ struct ravb_hw_info { > int stats_len; > u32 tccr_mask; > u32 rx_max_frame_size; > + u32 rx_max_desc_use; max_desc_use? [...] MBR, Sergey
diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index 7fa60fccb6ea..b12b379baf5a 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -1015,10 +1015,6 @@ enum CSR2_BIT { #define NUM_RX_QUEUE 2 #define NUM_TX_QUEUE 2 -#define RX_BUF_SZ (2048 - ETH_FCS_LEN + sizeof(__sum16)) - -#define GBETH_RX_DESC_DATA_SIZE 4080 - struct ravb_tstamp_skb { struct list_head list; struct sk_buff *skb; @@ -1058,6 +1054,7 @@ struct ravb_hw_info { int stats_len; u32 tccr_mask; u32 rx_max_frame_size; + u32 rx_max_desc_use; unsigned aligned_tx: 1; /* hardware features */ diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index 45383635e8e2..4ef4be9e152e 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -351,7 +351,7 @@ static void ravb_rx_ring_format_gbeth(struct net_device *ndev, int q) for (i = 0; i < priv->num_rx_ring[q]; i++) { /* RX descriptor */ rx_desc = &priv->rx_ring[q].desc[i]; - rx_desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE); + rx_desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use); dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data, priv->info->rx_max_frame_size, DMA_FROM_DEVICE); @@ -381,7 +381,7 @@ static void ravb_rx_ring_format_rcar(struct net_device *ndev, int q) for (i = 0; i < priv->num_rx_ring[q]; i++) { /* RX descriptor */ rx_desc = &priv->rx_ring[q].ex_desc[i]; - rx_desc->ds_cc = cpu_to_le16(RX_BUF_SZ); + rx_desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use); dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data, priv->info->rx_max_frame_size, DMA_FROM_DEVICE); @@ -921,7 +921,7 @@ static bool ravb_rx_gbeth(struct net_device *ndev, int *quota, int q) for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) { entry = priv->dirty_rx[q] % priv->num_rx_ring[q]; desc = &priv->rx_ring[q].desc[entry]; - desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE); + desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use); if (!priv->rx_skb[q][entry]) { skb = ravb_alloc_skb(ndev, info, GFP_ATOMIC); @@ -1036,7 +1036,7 @@ static bool ravb_rx_rcar(struct net_device *ndev, int *quota, int q) for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) { entry = priv->dirty_rx[q] % priv->num_rx_ring[q]; desc = &priv->rx_ring[q].ex_desc[entry]; - desc->ds_cc = cpu_to_le16(RX_BUF_SZ); + desc->ds_cc = cpu_to_le16(priv->info->rx_max_desc_use); if (!priv->rx_skb[q][entry]) { skb = ravb_alloc_skb(ndev, info, GFP_ATOMIC); @@ -2694,6 +2694,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = { .stats_len = ARRAY_SIZE(ravb_gstrings_stats), .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, .rx_max_frame_size = SZ_2K, + .rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16), .internal_delay = 1, .tx_counters = 1, .multi_irqs = 1, @@ -2719,6 +2720,7 @@ static const struct ravb_hw_info ravb_gen2_hw_info = { .stats_len = ARRAY_SIZE(ravb_gstrings_stats), .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, .rx_max_frame_size = SZ_2K, + .rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16), .aligned_tx = 1, .gptp = 1, .nc_queues = 1, @@ -2741,6 +2743,7 @@ static const struct ravb_hw_info ravb_rzv2m_hw_info = { .stats_len = ARRAY_SIZE(ravb_gstrings_stats), .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, .rx_max_frame_size = SZ_2K, + .rx_max_desc_use = SZ_2K - ETH_FCS_LEN + sizeof(__sum16), .multi_irqs = 1, .err_mgmt_irqs = 1, .gptp = 1, @@ -2765,6 +2768,7 @@ static const struct ravb_hw_info gbeth_hw_info = { .stats_len = ARRAY_SIZE(ravb_gstrings_stats_gbeth), .tccr_mask = TCCR_TSRQ0, .rx_max_frame_size = SZ_8K, + .rx_max_desc_use = 4080, .aligned_tx = 1, .tx_counters = 1, .carrier_counters = 1,
To make it possible to merge the R-Car and RZ/G2L code paths move the maximum usable size of a single Rx descriptor data slice in to the hardware information instead of using two different defines in the two different code paths. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- * Changes since v1 - Use SZ_2K macro instead of 2048 directly to align the style of the rest of the members in struct ravb_hw_info. --- drivers/net/ethernet/renesas/ravb.h | 5 +---- drivers/net/ethernet/renesas/ravb_main.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 8 deletions(-)