diff mbox series

[v3,1/2] dt-bindings: perf: Support uncore NI-700 PMU

Message ID 7f2576291e51043b33296a2cd9e21263d16ca077.1709694173.git.jialong.yang@shingroup.cn (mailing list archive)
State New, archived
Headers show
Series [v3,1/2] dt-bindings: perf: Support uncore NI-700 PMU | expand

Commit Message

Yang Jialong 杨佳龙 March 6, 2024, 6:16 a.m. UTC
Add file corresponding to hx_arm_ni.c introducing ARM NI-700 PMU
driver for HX.

Signed-off-by: JiaLong.Yang <jialong.yang@shingroup.cn>
---
v1 --> v2:
1. Submit dt-bindings file Seperately.
2. Do some check:
   ~ #: make dt_binding_check DT_SCHEMA_FILES=perf
   LINT    Documentation/devicetree/bindings
   CHKDT   Documentation/devicetree/bindings/processed-schema.json
   SCHEMA  Documentation/devicetree/bindings/processed-schema.json
   DTEX    Documentation/devicetree/bindings/perf/hx,c2000-arm-ni.example.dts
   DTC_CHK Documentation/devicetree/bindings/perf/hx,c2000-arm-ni.example.dtb

v2 --> v3:
1. Change vendor from hx to hexin.
2. Submit driver and dt-bindings files together.
3. Delete pccs-id property. Use alias-id to do this.
4. There are at least one interrupt line for the hardware and driver
   for handling counter overflow.
5. Use 4 spaces for example indentation in yaml file.

 .../bindings/perf/hexin,c2000-arm-ni.yaml     | 51 +++++++++++++++++++
 MAINTAINERS                                   |  6 +++
 2 files changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml

Comments

Rob Herring (Arm) March 6, 2024, 9:46 p.m. UTC | #1
On Wed, Mar 06, 2024 at 02:16:02PM +0800, JiaLong.Yang wrote:
> Add file corresponding to hx_arm_ni.c introducing ARM NI-700 PMU
> driver for HX.
> 
> Signed-off-by: JiaLong.Yang <jialong.yang@shingroup.cn>
> ---
> v1 --> v2:
> 1. Submit dt-bindings file Seperately.
> 2. Do some check:
>    ~ #: make dt_binding_check DT_SCHEMA_FILES=perf
>    LINT    Documentation/devicetree/bindings
>    CHKDT   Documentation/devicetree/bindings/processed-schema.json
>    SCHEMA  Documentation/devicetree/bindings/processed-schema.json
>    DTEX    Documentation/devicetree/bindings/perf/hx,c2000-arm-ni.example.dts
>    DTC_CHK Documentation/devicetree/bindings/perf/hx,c2000-arm-ni.example.dtb
> 
> v2 --> v3:
> 1. Change vendor from hx to hexin.
> 2. Submit driver and dt-bindings files together.
> 3. Delete pccs-id property. Use alias-id to do this.
> 4. There are at least one interrupt line for the hardware and driver
>    for handling counter overflow.
> 5. Use 4 spaces for example indentation in yaml file.
> 
>  .../bindings/perf/hexin,c2000-arm-ni.yaml     | 51 +++++++++++++++++++
>  MAINTAINERS                                   |  6 +++
>  2 files changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
> 
> diff --git a/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml b/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
> new file mode 100644
> index 000000000000..b2641ee84d60
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/perf/hexin,c2000-arm-ni.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HX-C2000 NI (Network-on-chip Interconnect) Performance Monitors
> +
> +maintainers:
> +  - Jialong Yang <jialong.yang@shingroup.cn>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - hexin,c2000-arm-ni

As this seems to be Arm IP, I'd expect arm,ni-700-pmu or something.

Are there Hexin modifications to it?

> +
> +  reg:
> +    items:
> +      - description: Physical address of the base (PERIPHBASE) and
> +          size of the whole NI configuration address space.

Just 'maxItems: 1' if there is only 1 entry.

> +
> +  interrupts:
> +    minItems: 1
> +    items:
> +      - description: Overflow interrupt for clock domain 0
> +      - description: Overflow interrupt for clock domain 1
> +      - description: Overflow interrupt for clock domain 2
> +      - description: Generally, one interrupt line for one PMU. But this also
> +          support one interrupt line for a NI if merged.

I don't understand this last entry.

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
> +    aliases {
> +        ni-pmu0 = &nipmu0;

Drop. Please don't make up your own alias names.

> +    };
> +
> +    nipmu0: pmu@23ff0000 {
> +        compatible = "hexin,c2000-arm-ni";
> +        reg = <0x2b420000 0x10000>;
> +        interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4f298c4187fb..4b664cec98a7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -18890,6 +18890,12 @@ L:	linux-riscv@lists.infradead.org
>  S:	Maintained
>  F:	arch/riscv/boot/dts/thead/
>  
> +HX ARM-NI-700 PMU DRIVERS
> +M:	Jialong Yang <jialong.yang@shingroup.cn>
> +S:	Supported
> +F:	Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
> +F:	drivers/perf/hx_arm_ni.c
> +
>  RNBD BLOCK DRIVERS
>  M:	Md. Haris Iqbal <haris.iqbal@ionos.com>
>  M:	Jack Wang <jinpu.wang@ionos.com>
> -- 
> 2.25.1
>
Yang Jialong 杨佳龙 March 7, 2024, 6:33 a.m. UTC | #2
在 2024/3/7 5:46, Rob Herring 写道:
> On Wed, Mar 06, 2024 at 02:16:02PM +0800, JiaLong.Yang wrote:
>> Add file corresponding to hx_arm_ni.c introducing ARM NI-700 PMU
>> driver for HX.
>>
>> Signed-off-by: JiaLong.Yang <jialong.yang@shingroup.cn>
>> ---
>> v1 --> v2:
>> 1. Submit dt-bindings file Seperately.
>> 2. Do some check:
>>     ~ #: make dt_binding_check DT_SCHEMA_FILES=perf
>>     LINT    Documentation/devicetree/bindings
>>     CHKDT   Documentation/devicetree/bindings/processed-schema.json
>>     SCHEMA  Documentation/devicetree/bindings/processed-schema.json
>>     DTEX    Documentation/devicetree/bindings/perf/hx,c2000-arm-ni.example.dts
>>     DTC_CHK Documentation/devicetree/bindings/perf/hx,c2000-arm-ni.example.dtb
>>
>> v2 --> v3:
>> 1. Change vendor from hx to hexin.
>> 2. Submit driver and dt-bindings files together.
>> 3. Delete pccs-id property. Use alias-id to do this.
>> 4. There are at least one interrupt line for the hardware and driver
>>     for handling counter overflow.
>> 5. Use 4 spaces for example indentation in yaml file.
>>
>>   .../bindings/perf/hexin,c2000-arm-ni.yaml     | 51 +++++++++++++++++++
>>   MAINTAINERS                                   |  6 +++
>>   2 files changed, 57 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml b/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
>> new file mode 100644
>> index 000000000000..b2641ee84d60
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
>> @@ -0,0 +1,51 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/perf/hexin,c2000-arm-ni.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: HX-C2000 NI (Network-on-chip Interconnect) Performance Monitors
>> +
>> +maintainers:
>> +  - Jialong Yang <jialong.yang@shingroup.cn>
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - hexin,c2000-arm-ni
> 
> As this seems to be Arm IP, I'd expect arm,ni-700-pmu or something.
> 
> Are there Hexin modifications to it?

Maybe only the employee of Hexin wrote it and it was written for a 
product named c2000... But in hardware layer, there is almost no difference.
Chould below?
enum:
	- hexin,c2000-ni-pmu
	- arm,ni-700-pmu

> 
>> +
>> +  reg:
>> +    items:
>> +      - description: Physical address of the base (PERIPHBASE) and
>> +          size of the whole NI configuration address space.
> 
> Just 'maxItems: 1' if there is only 1 entry.

OK.

> 
>> +
>> +  interrupts:
>> +    minItems: 1
>> +    items:
>> +      - description: Overflow interrupt for clock domain 0
>> +      - description: Overflow interrupt for clock domain 1
>> +      - description: Overflow interrupt for clock domain 2
>> +      - description: Generally, one interrupt line for one PMU. But this also
>> +          support one interrupt line for a NI if merged.
> 
> I don't understand this last entry.

Specially, one NI could have many PMUs with many interupt numbers.
The last entry means that the driver supports merging interrupts into 
one if hardware layer merged them.

> 
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - interrupts
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +    #include <dt-bindings/interrupt-controller/irq.h>
>> +
>> +    aliases {
>> +        ni-pmu0 = &nipmu0;
> 
> Drop. Please don't make up your own alias names.

Here I need a index to differ more than one NI node. Last version I used 
a custom property. Krzysztof Kozlowski advised me to use IDR, DT
aliases or something else.
Here I can use which one?...
It's my fault to forget writing the change in changelog.

> 
>> +    };
>> +
>> +    nipmu0: pmu@23ff0000 {
>> +        compatible = "hexin,c2000-arm-ni";
>> +        reg = <0x2b420000 0x10000>;
>> +        interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
>> +    };
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 4f298c4187fb..4b664cec98a7 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -18890,6 +18890,12 @@ L:	linux-riscv@lists.infradead.org
>>   S:	Maintained
>>   F:	arch/riscv/boot/dts/thead/
>>   
>> +HX ARM-NI-700 PMU DRIVERS
>> +M:	Jialong Yang <jialong.yang@shingroup.cn>
>> +S:	Supported
>> +F:	Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
>> +F:	drivers/perf/hx_arm_ni.c
>> +
>>   RNBD BLOCK DRIVERS
>>   M:	Md. Haris Iqbal <haris.iqbal@ionos.com>
>>   M:	Jack Wang <jinpu.wang@ionos.com>
>> -- 
>> 2.25.1
>>
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml b/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
new file mode 100644
index 000000000000..b2641ee84d60
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
@@ -0,0 +1,51 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/hexin,c2000-arm-ni.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HX-C2000 NI (Network-on-chip Interconnect) Performance Monitors
+
+maintainers:
+  - Jialong Yang <jialong.yang@shingroup.cn>
+
+properties:
+  compatible:
+    enum:
+      - hexin,c2000-arm-ni
+
+  reg:
+    items:
+      - description: Physical address of the base (PERIPHBASE) and
+          size of the whole NI configuration address space.
+
+  interrupts:
+    minItems: 1
+    items:
+      - description: Overflow interrupt for clock domain 0
+      - description: Overflow interrupt for clock domain 1
+      - description: Overflow interrupt for clock domain 2
+      - description: Generally, one interrupt line for one PMU. But this also
+          support one interrupt line for a NI if merged.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    aliases {
+        ni-pmu0 = &nipmu0;
+    };
+
+    nipmu0: pmu@23ff0000 {
+        compatible = "hexin,c2000-arm-ni";
+        reg = <0x2b420000 0x10000>;
+        interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 4f298c4187fb..4b664cec98a7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18890,6 +18890,12 @@  L:	linux-riscv@lists.infradead.org
 S:	Maintained
 F:	arch/riscv/boot/dts/thead/
 
+HX ARM-NI-700 PMU DRIVERS
+M:	Jialong Yang <jialong.yang@shingroup.cn>
+S:	Supported
+F:	Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml
+F:	drivers/perf/hx_arm_ni.c
+
 RNBD BLOCK DRIVERS
 M:	Md. Haris Iqbal <haris.iqbal@ionos.com>
 M:	Jack Wang <jinpu.wang@ionos.com>