diff mbox series

[v2,3/3] mips: dts: ralink: mt7621: add serial1 and serial2 nodes

Message ID 20240307190408.23443-3-justin.swartz@risingedge.co.za (mailing list archive)
State New, archived
Headers show
Series [v2,1/3] mips: dts: ralink: mt7621: associate uart1_pins with serial0 | expand

Commit Message

Justin Swartz March 7, 2024, 7:04 p.m. UTC 
Add serial1 and serial2 nodes to define the existence of
the MT7621's second and third UARTs.

Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 28 +++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

--

Comments

Sergio Paracuellos March 8, 2024, 7:28 a.m. UTC | #1 
On Thu, Mar 7, 2024 at 8:05 PM Justin Swartz
<justin.swartz@risingedge.co.za> wrote:
>
> Add serial1 and serial2 nodes to define the existence of
> the MT7621's second and third UARTs.
>
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
> ---
>  arch/mips/boot/dts/ralink/mt7621.dtsi | 28 +++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>

Thanks,
    Sergio Paracuellos
AngeloGioacchino Del Regno March 8, 2024, 8:44 a.m. UTC | #2 
Il 07/03/24 20:04, Justin Swartz ha scritto:
> Add serial1 and serial2 nodes to define the existence of
> the MT7621's second and third UARTs.
> 
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
> ---
>   arch/mips/boot/dts/ralink/mt7621.dtsi | 28 +++++++++++++++++++++++++++
>   1 file changed, 28 insertions(+)
> 
> diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
> index 3ad4e2343..5a89f0b8c 100644
> --- a/arch/mips/boot/dts/ralink/mt7621.dtsi
> +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
> @@ -124,6 +124,34 @@ serial0: serial@c00 {
>   			pinctrl-0 = <&uart1_pins>;
>   		};
>   
> +		serial1: serial@d00 {
> +			compatible = "ns16550a";
> +			reg = <0xd00 0x100>;
> +			reg-io-width = <4>;
> +			reg-shift = <2>;
> +			clocks = <&sysc MT7621_CLK_UART2>;
> +			interrupt-parent = <&gic>;
> +			interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
> +			no-loopback-test;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&uart2_pins>;

As already commented on patch [1/3], pin muxing is board specific. Please remove.

Also, is there any reason why you can't simply use the `interrupts-extended`
property instead of interrupt-parent and interrupts?

Regards,
Angelo
Arınç ÜNAL March 8, 2024, 10:56 a.m. UTC | #3 
On 8.03.2024 11:44, AngeloGioacchino Del Regno wrote:
> Il 07/03/24 20:04, Justin Swartz ha scritto:
>> Add serial1 and serial2 nodes to define the existence of
>> the MT7621's second and third UARTs.
>>
>> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
>> ---
>>   arch/mips/boot/dts/ralink/mt7621.dtsi | 28 +++++++++++++++++++++++++++
>>   1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
>> index 3ad4e2343..5a89f0b8c 100644
>> --- a/arch/mips/boot/dts/ralink/mt7621.dtsi
>> +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
>> @@ -124,6 +124,34 @@ serial0: serial@c00 {
>>               pinctrl-0 = <&uart1_pins>;
>>           };
>> +        serial1: serial@d00 {
>> +            compatible = "ns16550a";
>> +            reg = <0xd00 0x100>;
>> +            reg-io-width = <4>;
>> +            reg-shift = <2>;
>> +            clocks = <&sysc MT7621_CLK_UART2>;
>> +            interrupt-parent = <&gic>;
>> +            interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
>> +            no-loopback-test;
>> +            pinctrl-names = "default";
>> +            pinctrl-0 = <&uart2_pins>;
> 
> As already commented on patch [1/3], pin muxing is board specific. Please remove.
> 
> Also, is there any reason why you can't simply use the `interrupts-extended`
> property instead of interrupt-parent and interrupts?

I'm looking at the documentation [1], it seems to be useful when multiple
interrupt parents need to be defined on a node. I'd continue using
interrupt-parent and interrupts in this case.

[1] https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt

Arınç
Arınç ÜNAL March 8, 2024, 1:50 p.m. UTC | #4 
On 7.03.2024 22:04, Justin Swartz wrote:
> Add serial1 and serial2 nodes to define the existence of
> the MT7621's second and third UARTs.
> 
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
> ---
>   arch/mips/boot/dts/ralink/mt7621.dtsi | 28 +++++++++++++++++++++++++++
>   1 file changed, 28 insertions(+)
> 
> diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
> index 3ad4e2343..5a89f0b8c 100644
> --- a/arch/mips/boot/dts/ralink/mt7621.dtsi
> +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
> @@ -124,6 +124,34 @@ serial0: serial@c00 {
>   			pinctrl-0 = <&uart1_pins>;
>   		};
>   
> +		serial1: serial@d00 {
> +			compatible = "ns16550a";
> +			reg = <0xd00 0x100>;
> +			reg-io-width = <4>;
> +			reg-shift = <2>;
> +			clocks = <&sysc MT7621_CLK_UART2>;
> +			interrupt-parent = <&gic>;
> +			interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
> +			no-loopback-test;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&uart2_pins>;
> +			status = "disabled";
> +		};

I would group this:

		serial1: serial@d00 {
			compatible = "ns16550a";
			reg = <0xd00 0x100>;

			reg-io-width = <4>;
			reg-shift = <2>;

			clocks = <&sysc MT7621_CLK_UART2>;

			interrupt-parent = <&gic>;
			interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;

			no-loopback-test;

			pinctrl-names = "default";
			pinctrl-0 = <&uart2_pins>;

			status = "disabled";
		};

Same goes for patch 2.

Arınç
Justin Swartz March 8, 2024, 1:56 p.m. UTC | #5 
On 2024-03-08 15:50, Arınç ÜNAL wrote:
> On 7.03.2024 22:04, Justin Swartz wrote:
>> Add serial1 and serial2 nodes to define the existence of
>> the MT7621's second and third UARTs.
>> 
>> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
>> ---
>>   arch/mips/boot/dts/ralink/mt7621.dtsi | 28 
>> +++++++++++++++++++++++++++
>>   1 file changed, 28 insertions(+)
>> 
>> diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi 
>> b/arch/mips/boot/dts/ralink/mt7621.dtsi
>> index 3ad4e2343..5a89f0b8c 100644
>> --- a/arch/mips/boot/dts/ralink/mt7621.dtsi
>> +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
>> @@ -124,6 +124,34 @@ serial0: serial@c00 {
>>   			pinctrl-0 = <&uart1_pins>;
>>   		};
>>   +		serial1: serial@d00 {
>> +			compatible = "ns16550a";
>> +			reg = <0xd00 0x100>;
>> +			reg-io-width = <4>;
>> +			reg-shift = <2>;
>> +			clocks = <&sysc MT7621_CLK_UART2>;
>> +			interrupt-parent = <&gic>;
>> +			interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
>> +			no-loopback-test;
>> +			pinctrl-names = "default";
>> +			pinctrl-0 = <&uart2_pins>;
>> +			status = "disabled";
>> +		};
> 
> I would group this:
> 
> 		serial1: serial@d00 {
> 			compatible = "ns16550a";
> 			reg = <0xd00 0x100>;
> 
> 			reg-io-width = <4>;
> 			reg-shift = <2>;
> 
> 			clocks = <&sysc MT7621_CLK_UART2>;
> 
> 			interrupt-parent = <&gic>;
> 			interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
> 
> 			no-loopback-test;
> 
> 			pinctrl-names = "default";
> 			pinctrl-0 = <&uart2_pins>;
> 
> 			status = "disabled";
> 		};
> 
> Same goes for patch 2.

Thanks for the example.

Regards
Justin
diff mbox series

Patch

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 3ad4e2343..5a89f0b8c 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -124,6 +124,34 @@  serial0: serial@c00 {
 			pinctrl-0 = <&uart1_pins>;
 		};
 
+		serial1: serial@d00 {
+			compatible = "ns16550a";
+			reg = <0xd00 0x100>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+			clocks = <&sysc MT7621_CLK_UART2>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart2_pins>;
+			status = "disabled";
+		};
+
+		serial2: serial@e00 {
+			compatible = "ns16550a";
+			reg = <0xe00 0x100>;
+			reg-io-width = <4>;
+			reg-shift = <2>;
+			clocks = <&sysc MT7621_CLK_UART3>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>;
+			no-loopback-test;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart3_pins>;
+			status = "disabled";
+		};
+
 		spi0: spi@b00 {
 			status = "disabled";