| Message ID | 20240301164227.339208-3-abdellatif.elkhlifi@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | remoteproc: introduce Arm remoteproc support | expand |
On 01/03/2024 17:42, abdellatif.elkhlifi@arm.com wrote: > From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> > > add device tree node for the external system core in Corstone-1000 > > Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> > --- > arch/arm64/boot/dts/arm/corstone1000.dtsi | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi > index 6ad7829f9e28..67df642363e9 100644 > --- a/arch/arm64/boot/dts/arm/corstone1000.dtsi > +++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0 OR MIT > /* > - * Copyright (c) 2022, Arm Limited. All rights reserved. > + * Copyright 2022, 2024, Arm Limited and/or its affiliates <open-source-office@arm.com> > * Copyright (c) 2022, Linaro Limited. All rights reserved. > * > */ > @@ -157,5 +157,13 @@ mhu_seh1: mailbox@1b830000 { > secure-status = "okay"; /* secure-world-only */ > status = "disabled"; > }; > + > + extsys0: remoteproc@1a010310 { Looks not really ordered. > + compatible = "arm,corstone1000-extsys"; > + reg = <0x1a010310 0x4>, > + <0x1a010314 0X4>; And this needs alignment. Best regards, Krzysztof
On Fri, Mar 01, 2024 at 04:42:26PM +0000, abdellatif.elkhlifi@arm.com wrote: > From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> > > add device tree node for the external system core in Corstone-1000 > > Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> > --- > arch/arm64/boot/dts/arm/corstone1000.dtsi | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi > index 6ad7829f9e28..67df642363e9 100644 > --- a/arch/arm64/boot/dts/arm/corstone1000.dtsi > +++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0 OR MIT > /* > - * Copyright (c) 2022, Arm Limited. All rights reserved. > + * Copyright 2022, 2024, Arm Limited and/or its affiliates <open-source-office@arm.com> > * Copyright (c) 2022, Linaro Limited. All rights reserved. > * > */ > @@ -157,5 +157,13 @@ mhu_seh1: mailbox@1b830000 { > secure-status = "okay"; /* secure-world-only */ > status = "disabled"; > }; > + > + extsys0: remoteproc@1a010310 { > + compatible = "arm,corstone1000-extsys"; > + reg = <0x1a010310 0x4>, > + <0x1a010314 0X4>; As per [1], this is just a few registers within the 64kB block. Not sure if it should be represented as a whole on just couple of registers like this for reset.
Hi Sudeep, > > + extsys0: remoteproc@1a010310 { > > + compatible = "arm,corstone1000-extsys"; > > + reg = <0x1a010310 0x4>, > > + <0x1a010314 0X4>; > > > As per [1], this is just a few registers within the 64kB block. > Not sure if it should be represented as a whole on just couple > of registers like this for reset. > > [1] https://developer.arm.com/documentation/101418/0100/Programmers-model/Register-descriptions/Host-Base-System-Control-register-summary The Host Base System Control registers are not specific to the External System processors. They are various registers with different purposes. Only 4 registers matter for the remoteproc feature: - The External system 0 reset control and status registers: EXT_SYS0_RST_CTRL, EXT_SYS0_RST_ST - Same for the the External system 1: EXT_SYS1_RST_CTRL, EXT_SYS1_RST_ST So, mapping the whole Host Base System Control area doesn't make sense for the remoteproc feature and exposes registers that are not related to the External Systems to the driver. By the way, the latest document we are referring to is [1]. [1]: https://developer.arm.com/documentation/102342/0000/Programmers-model/Register-descriptions/Host-Base-System-Control-register-summary Cheers, Abdellatif
diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi index 6ad7829f9e28..67df642363e9 100644 --- a/arch/arm64/boot/dts/arm/corstone1000.dtsi +++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR MIT /* - * Copyright (c) 2022, Arm Limited. All rights reserved. + * Copyright 2022, 2024, Arm Limited and/or its affiliates <open-source-office@arm.com> * Copyright (c) 2022, Linaro Limited. All rights reserved. * */ @@ -157,5 +157,13 @@ mhu_seh1: mailbox@1b830000 { secure-status = "okay"; /* secure-world-only */ status = "disabled"; }; + + extsys0: remoteproc@1a010310 { + compatible = "arm,corstone1000-extsys"; + reg = <0x1a010310 0x4>, + <0x1a010314 0X4>; + reg-names = "reset-control", "reset-status"; + firmware-name = "es_flashfw.elf"; + }; }; };