| Message ID | 20240314063334.31942-1-quic_lxu5@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: qcom: sm8650: Add three missing fastrpc-compute-cb nodes | expand |
On 14/03/2024 07:33, Ling Xu wrote: > Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC. > > Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sm8650.dtsi | 29 ++++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi > index ba72d8f38420..c238ad1be0d4 100644 > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi > @@ -5084,6 +5084,35 @@ > <&apps_smmu 0x19c8 0x0>; > dma-coherent; > }; > + > + /* note: secure cb9 in downstream */ > + > + compute-cb@10 { > + compatible = "qcom,fastrpc-compute-cb"; > + reg = <12>; > + iommus = <&apps_smmu 0x196C 0x0000>, > + <&apps_smmu 0x0C0C 0x0020>, > + <&apps_smmu 0x19CC 0x0000>; Lowercase hex. Please look at the code above, don't copy downstream code. This applies to all your work: don't send us downstream code, but clean it up from all of its problems. Best regards, Krzysztof
在 2024/3/14 14:55, Krzysztof Kozlowski 写道: > On 14/03/2024 07:33, Ling Xu wrote: >> Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC. >> >> Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sm8650.dtsi | 29 ++++++++++++++++++++++++++++ >> 1 file changed, 29 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi >> index ba72d8f38420..c238ad1be0d4 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi >> @@ -5084,6 +5084,35 @@ >> <&apps_smmu 0x19c8 0x0>; >> dma-coherent; >> }; >> + >> + /* note: secure cb9 in downstream */ >> + >> + compute-cb@10 { >> + compatible = "qcom,fastrpc-compute-cb"; >> + reg = <12>; >> + iommus = <&apps_smmu 0x196C 0x0000>, >> + <&apps_smmu 0x0C0C 0x0020>, >> + <&apps_smmu 0x19CC 0x0000>; > > Lowercase hex. Please look at the code above, don't copy downstream > code. This applies to all your work: don't send us downstream code, but > clean it up from all of its problems. > > Best regards, > Krzysztof > Hi, sorry, do you mean that I should delete this line: /* note: secure cb9 in downstream */? All I sent are upstream codes, I didn't copy cb9 here and I also see this commented line in sm8550.dtsi.
On 14/03/2024 11:05, Ling Xu wrote: > 在 2024/3/14 14:55, Krzysztof Kozlowski 写道: >> On 14/03/2024 07:33, Ling Xu wrote: >>> Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC. >>> >>> Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 29 ++++++++++++++++++++++++++++ >>> 1 file changed, 29 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi >>> index ba72d8f38420..c238ad1be0d4 100644 >>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi >>> @@ -5084,6 +5084,35 @@ >>> <&apps_smmu 0x19c8 0x0>; >>> dma-coherent; >>> }; >>> + >>> + /* note: secure cb9 in downstream */ >>> + >>> + compute-cb@10 { >>> + compatible = "qcom,fastrpc-compute-cb"; >>> + reg = <12>; >>> + iommus = <&apps_smmu 0x196C 0x0000>, >>> + <&apps_smmu 0x0C0C 0x0020>, >>> + <&apps_smmu 0x19CC 0x0000>; >> >> Lowercase hex. Please look at the code above, don't copy downstream >> code. This applies to all your work: don't send us downstream code, but >> clean it up from all of its problems. >> >> Best regards, >> Krzysztof >> > > Hi, sorry, do you mean that I should delete this line: /* note: secure cb9 in downstream */? > All I sent are upstream codes, I didn't copy cb9 here and I also see this commented line in sm8550.dtsi. My comment was about the style. If you send "upstream codes", how could you have there uppercase hex? It is even visible in the diff context that it should be lowercase! Best regards, Krzysztof
在 2024/3/14 18:09, Krzysztof Kozlowski 写道: > On 14/03/2024 11:05, Ling Xu wrote: >> 在 2024/3/14 14:55, Krzysztof Kozlowski 写道: >>> On 14/03/2024 07:33, Ling Xu wrote: >>>> Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC. >>>> >>>> Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> >>>> --- >>>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 29 ++++++++++++++++++++++++++++ >>>> 1 file changed, 29 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi >>>> index ba72d8f38420..c238ad1be0d4 100644 >>>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi >>>> @@ -5084,6 +5084,35 @@ >>>> <&apps_smmu 0x19c8 0x0>; >>>> dma-coherent; >>>> }; >>>> + >>>> + /* note: secure cb9 in downstream */ >>>> + >>>> + compute-cb@10 { >>>> + compatible = "qcom,fastrpc-compute-cb"; >>>> + reg = <12>; >>>> + iommus = <&apps_smmu 0x196C 0x0000>, >>>> + <&apps_smmu 0x0C0C 0x0020>, >>>> + <&apps_smmu 0x19CC 0x0000>; >>> >>> Lowercase hex. Please look at the code above, don't copy downstream >>> code. This applies to all your work: don't send us downstream code, but >>> clean it up from all of its problems. >>> >>> Best regards, >>> Krzysztof >>> >> >> Hi, sorry, do you mean that I should delete this line: /* note: secure cb9 in downstream */? >> All I sent are upstream codes, I didn't copy cb9 here and I also see this commented line in sm8550.dtsi. > > My comment was about the style. If you send "upstream codes", how could > you have there uppercase hex? It is even visible in the diff context > that it should be lowercase! > > Best regards, > Krzysztof > Sorry for that, I got it. Thanks for your comment.
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index ba72d8f38420..c238ad1be0d4 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -5084,6 +5084,35 @@ <&apps_smmu 0x19c8 0x0>; dma-coherent; }; + + /* note: secure cb9 in downstream */ + + compute-cb@10 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <12>; + iommus = <&apps_smmu 0x196C 0x0000>, + <&apps_smmu 0x0C0C 0x0020>, + <&apps_smmu 0x19CC 0x0000>; + dma-coherent; + }; + + compute-cb@11 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <13>; + iommus = <&apps_smmu 0x196D 0x0000>, + <&apps_smmu 0x0C0D 0x0020>, + <&apps_smmu 0x19CD 0x0000>; + dma-coherent; + }; + + compute-cb@12 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <14>; + iommus = <&apps_smmu 0x196E 0x0000>, + <&apps_smmu 0x0C0E 0x0020>, + <&apps_smmu 0x19CE 0x0000>; + dma-coherent; + }; }; }; };
Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC. Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 29 ++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)