diff mbox series

[3/3] ARM: dts: renesas: rcar-gen2: Add TMU nodes

Message ID 7efbc8dbac6876f454011563edc1ae8eb50c95db.1710864964.git.geert+renesas@glider.be (mailing list archive)
State New, archived
Headers show
Series ARM: dts: renesas: Add more TMU support | expand

Commit Message

Geert Uytterhoeven March 19, 2024, 4:29 p.m. UTC
Add device nodes for the Timer Units (TMU) on the R-Car H2 (R8A7790),
M2-W (R8A7791), V2H (R8A7792), M2-N (R8A7793), and E2 (R8A7794) SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/renesas/r8a7790.dtsi | 58 +++++++++++++++++++++++++
 arch/arm/boot/dts/renesas/r8a7791.dtsi | 58 +++++++++++++++++++++++++
 arch/arm/boot/dts/renesas/r8a7792.dtsi | 59 ++++++++++++++++++++++++++
 arch/arm/boot/dts/renesas/r8a7793.dtsi | 58 +++++++++++++++++++++++++
 arch/arm/boot/dts/renesas/r8a7794.dtsi | 58 +++++++++++++++++++++++++
 5 files changed, 291 insertions(+)

Comments

Niklas Söderlund March 19, 2024, 10:55 p.m. UTC | #1
Hi Geert,

Thanks for your work.

On 2024-03-19 17:29:07 +0100, Geert Uytterhoeven wrote:
> Add device nodes for the Timer Units (TMU) on the R-Car H2 (R8A7790),
> M2-W (R8A7791), V2H (R8A7792), M2-N (R8A7793), and E2 (R8A7794) SoCs.

Maybe add the TMU3 issue on M2-W from the cover letter here too?

> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  arch/arm/boot/dts/renesas/r8a7790.dtsi | 58 +++++++++++++++++++++++++
>  arch/arm/boot/dts/renesas/r8a7791.dtsi | 58 +++++++++++++++++++++++++
>  arch/arm/boot/dts/renesas/r8a7792.dtsi | 59 ++++++++++++++++++++++++++
>  arch/arm/boot/dts/renesas/r8a7793.dtsi | 58 +++++++++++++++++++++++++
>  arch/arm/boot/dts/renesas/r8a7794.dtsi | 58 +++++++++++++++++++++++++
>  5 files changed, 291 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi
> index 46fb81f5062ff6bc..583b74a9f071c39e 100644
> --- a/arch/arm/boot/dts/renesas/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7790.dtsi
> @@ -434,6 +434,64 @@ irqc0: interrupt-controller@e61c0000 {
>  			resets = <&cpg 407>;
>  		};
>  
> +		tmu0: timer@e61e0000 {
> +			compatible = "renesas,tmu-r8a7790", "renesas,tmu";
> +			reg = <0 0xe61e0000 0 0x30>;
> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 125>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> +			resets = <&cpg 125>;
> +			status = "disabled";
> +		};
> +
> +		tmu1: timer@fff60000 {
> +			compatible = "renesas,tmu-r8a7790", "renesas,tmu";
> +			reg = <0 0xfff60000 0 0x30>;
> +			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 111>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> +			resets = <&cpg 111>;
> +			status = "disabled";
> +		};
> +
> +		tmu2: timer@fff70000 {
> +			compatible = "renesas,tmu-r8a7790", "renesas,tmu";
> +			reg = <0 0xfff70000 0 0x30>;
> +			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 122>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> +			resets = <&cpg 122>;
> +			status = "disabled";
> +		};
> +
> +		tmu3: timer@fff80000 {
> +			compatible = "renesas,tmu-r8a7790", "renesas,tmu";
> +			reg = <0 0xfff80000 0 0x30>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 121>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> +			resets = <&cpg 121>;
> +			status = "disabled";
> +		};
> +
>  		thermal: thermal@e61f0000 {
>  			compatible = "renesas,thermal-r8a7790",
>  				     "renesas,rcar-gen2-thermal",
> diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi
> index b9d34147628e1201..de08ceb62230b6dd 100644
> --- a/arch/arm/boot/dts/renesas/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7791.dtsi
> @@ -351,6 +351,64 @@ irqc0: interrupt-controller@e61c0000 {
>  			resets = <&cpg 407>;
>  		};
>  
> +		tmu0: timer@e61e0000 {
> +			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
> +			reg = <0 0xe61e0000 0 0x30>;
> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 125>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> +			resets = <&cpg 125>;
> +			status = "disabled";
> +		};
> +
> +		tmu1: timer@fff60000 {
> +			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
> +			reg = <0 0xfff60000 0 0x30>;
> +			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 111>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> +			resets = <&cpg 111>;
> +			status = "disabled";
> +		};
> +
> +		tmu2: timer@fff70000 {
> +			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
> +			reg = <0 0xfff70000 0 0x30>;
> +			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 122>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> +			resets = <&cpg 122>;
> +			status = "disabled";
> +		};
> +
> +		tmu3: timer@fff80000 {
> +			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
> +			reg = <0 0xfff80000 0 0x30>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 121>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> +			resets = <&cpg 121>;
> +			status = "disabled";
> +		};
> +
>  		thermal: thermal@e61f0000 {
>  			compatible = "renesas,thermal-r8a7791",
>  				     "renesas,rcar-gen2-thermal",
> diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi
> index ecfab3ff59e843ff..7defeb8e4cd1f499 100644
> --- a/arch/arm/boot/dts/renesas/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7792.dtsi
> @@ -351,6 +351,65 @@ irqc: interrupt-controller@e61c0000 {
>  			resets = <&cpg 407>;
>  		};
>  
> +		tmu0: timer@e61e0000 {
> +			compatible = "renesas,tmu-r8a7792", "renesas,tmu";
> +			reg = <0 0xe61e0000 0 0x30>;
> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 125>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> +			resets = <&cpg 125>;
> +			status = "disabled";
> +		};
> +
> +		tmu1: timer@fff60000 {
> +			compatible = "renesas,tmu-r8a7792", "renesas,tmu";
> +			reg = <0 0xfff60000 0 0x30>;
> +			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 111>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> +			resets = <&cpg 111>;
> +			status = "disabled";
> +		};
> +
> +		tmu2: timer@fff70000 {
> +			compatible = "renesas,tmu-r8a7792", "renesas,tmu";
> +			reg = <0 0xfff70000 0 0x30>;
> +			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 122>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> +			resets = <&cpg 122>;
> +			status = "disabled";
> +		};
> +
> +		tmu3: timer@fff80000 {
> +			compatible = "renesas,tmu-r8a7792", "renesas,tmu";
> +			reg = <0 0xfff80000 0 0x30>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 121>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> +			resets = <&cpg 121>;
> +			status = "disabled";
> +		};
> +
>  		icram0:	sram@e63a0000 {
>  			compatible = "mmio-sram";
>  			reg = <0 0xe63a0000 0 0x12000>;
> diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi
> index f51bf687f4bd55d3..d32a9d5d3faa71fc 100644
> --- a/arch/arm/boot/dts/renesas/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7793.dtsi
> @@ -326,6 +326,64 @@ irqc0: interrupt-controller@e61c0000 {
>  			resets = <&cpg 407>;
>  		};
>  
> +		tmu0: timer@e61e0000 {
> +			compatible = "renesas,tmu-r8a7793", "renesas,tmu";
> +			reg = <0 0xe61e0000 0 0x30>;
> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 125>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> +			resets = <&cpg 125>;
> +			status = "disabled";
> +		};
> +
> +		tmu1: timer@fff60000 {
> +			compatible = "renesas,tmu-r8a7793", "renesas,tmu";
> +			reg = <0 0xfff60000 0 0x30>;
> +			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 111>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> +			resets = <&cpg 111>;
> +			status = "disabled";
> +		};
> +
> +		tmu2: timer@fff70000 {
> +			compatible = "renesas,tmu-r8a7793", "renesas,tmu";
> +			reg = <0 0xfff70000 0 0x30>;
> +			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 122>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> +			resets = <&cpg 122>;
> +			status = "disabled";
> +		};
> +
> +		tmu3: timer@fff80000 {
> +			compatible = "renesas,tmu-r8a7793", "renesas,tmu";
> +			reg = <0 0xfff80000 0 0x30>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 121>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> +			resets = <&cpg 121>;
> +			status = "disabled";
> +		};
> +
>  		thermal: thermal@e61f0000 {
>  			compatible = "renesas,thermal-r8a7793",
>  				     "renesas,rcar-gen2-thermal",
> diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi
> index 371dd4715ddef83d..f37f094cecc8c399 100644
> --- a/arch/arm/boot/dts/renesas/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7794.dtsi
> @@ -292,6 +292,64 @@ irqc0: interrupt-controller@e61c0000 {
>  			resets = <&cpg 407>;
>  		};
>  
> +		tmu0: timer@e61e0000 {
> +			compatible = "renesas,tmu-r8a7794", "renesas,tmu";
> +			reg = <0 0xe61e0000 0 0x30>;
> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 125>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> +			resets = <&cpg 125>;
> +			status = "disabled";
> +		};
> +
> +		tmu1: timer@fff60000 {
> +			compatible = "renesas,tmu-r8a7794", "renesas,tmu";
> +			reg = <0 0xfff60000 0 0x30>;
> +			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 111>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> +			resets = <&cpg 111>;
> +			status = "disabled";
> +		};
> +
> +		tmu2: timer@fff70000 {
> +			compatible = "renesas,tmu-r8a7794", "renesas,tmu";
> +			reg = <0 0xfff70000 0 0x30>;
> +			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> +			clocks = <&cpg CPG_MOD 122>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> +			resets = <&cpg 122>;
> +			status = "disabled";
> +		};
> +
> +		tmu3: timer@fff80000 {
> +			compatible = "renesas,tmu-r8a7794", "renesas,tmu";
> +			reg = <0 0xfff80000 0 0x30>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "tuni0", "tuni1", "tuni2";
> +			clocks = <&cpg CPG_MOD 121>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> +			resets = <&cpg 121>;
> +			status = "disabled";
> +		};
> +
>  		ipmmu_sy0: iommu@e6280000 {
>  			compatible = "renesas,ipmmu-r8a7794",
>  				     "renesas,ipmmu-vmsa";
> -- 
> 2.34.1
>
Wolfram Sang March 20, 2024, 7:31 a.m. UTC | #2
On Tue, Mar 19, 2024 at 05:29:07PM +0100, Geert Uytterhoeven wrote:
> Add device nodes for the Timer Units (TMU) on the R-Car H2 (R8A7790),
> M2-W (R8A7791), V2H (R8A7792), M2-N (R8A7793), and E2 (R8A7794) SoCs.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I don't see anything wrong here, i.e. no obvious reason for TMU3 failing
on M2-W.

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi
index 46fb81f5062ff6bc..583b74a9f071c39e 100644
--- a/arch/arm/boot/dts/renesas/r8a7790.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7790.dtsi
@@ -434,6 +434,64 @@  irqc0: interrupt-controller@e61c0000 {
 			resets = <&cpg 407>;
 		};
 
+		tmu0: timer@e61e0000 {
+			compatible = "renesas,tmu-r8a7790", "renesas,tmu";
+			reg = <0 0xe61e0000 0 0x30>;
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 125>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+			resets = <&cpg 125>;
+			status = "disabled";
+		};
+
+		tmu1: timer@fff60000 {
+			compatible = "renesas,tmu-r8a7790", "renesas,tmu";
+			reg = <0 0xfff60000 0 0x30>;
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 111>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+			resets = <&cpg 111>;
+			status = "disabled";
+		};
+
+		tmu2: timer@fff70000 {
+			compatible = "renesas,tmu-r8a7790", "renesas,tmu";
+			reg = <0 0xfff70000 0 0x30>;
+			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 122>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+			resets = <&cpg 122>;
+			status = "disabled";
+		};
+
+		tmu3: timer@fff80000 {
+			compatible = "renesas,tmu-r8a7790", "renesas,tmu";
+			reg = <0 0xfff80000 0 0x30>;
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 121>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+			resets = <&cpg 121>;
+			status = "disabled";
+		};
+
 		thermal: thermal@e61f0000 {
 			compatible = "renesas,thermal-r8a7790",
 				     "renesas,rcar-gen2-thermal",
diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi
index b9d34147628e1201..de08ceb62230b6dd 100644
--- a/arch/arm/boot/dts/renesas/r8a7791.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7791.dtsi
@@ -351,6 +351,64 @@  irqc0: interrupt-controller@e61c0000 {
 			resets = <&cpg 407>;
 		};
 
+		tmu0: timer@e61e0000 {
+			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
+			reg = <0 0xe61e0000 0 0x30>;
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 125>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+			resets = <&cpg 125>;
+			status = "disabled";
+		};
+
+		tmu1: timer@fff60000 {
+			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
+			reg = <0 0xfff60000 0 0x30>;
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 111>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+			resets = <&cpg 111>;
+			status = "disabled";
+		};
+
+		tmu2: timer@fff70000 {
+			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
+			reg = <0 0xfff70000 0 0x30>;
+			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 122>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+			resets = <&cpg 122>;
+			status = "disabled";
+		};
+
+		tmu3: timer@fff80000 {
+			compatible = "renesas,tmu-r8a7791", "renesas,tmu";
+			reg = <0 0xfff80000 0 0x30>;
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 121>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+			resets = <&cpg 121>;
+			status = "disabled";
+		};
+
 		thermal: thermal@e61f0000 {
 			compatible = "renesas,thermal-r8a7791",
 				     "renesas,rcar-gen2-thermal",
diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi
index ecfab3ff59e843ff..7defeb8e4cd1f499 100644
--- a/arch/arm/boot/dts/renesas/r8a7792.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7792.dtsi
@@ -351,6 +351,65 @@  irqc: interrupt-controller@e61c0000 {
 			resets = <&cpg 407>;
 		};
 
+		tmu0: timer@e61e0000 {
+			compatible = "renesas,tmu-r8a7792", "renesas,tmu";
+			reg = <0 0xe61e0000 0 0x30>;
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 125>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			resets = <&cpg 125>;
+			status = "disabled";
+		};
+
+		tmu1: timer@fff60000 {
+			compatible = "renesas,tmu-r8a7792", "renesas,tmu";
+			reg = <0 0xfff60000 0 0x30>;
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 111>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			resets = <&cpg 111>;
+			status = "disabled";
+		};
+
+		tmu2: timer@fff70000 {
+			compatible = "renesas,tmu-r8a7792", "renesas,tmu";
+			reg = <0 0xfff70000 0 0x30>;
+			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 122>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			resets = <&cpg 122>;
+			status = "disabled";
+		};
+
+		tmu3: timer@fff80000 {
+			compatible = "renesas,tmu-r8a7792", "renesas,tmu";
+			reg = <0 0xfff80000 0 0x30>;
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 121>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			resets = <&cpg 121>;
+			status = "disabled";
+		};
+
 		icram0:	sram@e63a0000 {
 			compatible = "mmio-sram";
 			reg = <0 0xe63a0000 0 0x12000>;
diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi
index f51bf687f4bd55d3..d32a9d5d3faa71fc 100644
--- a/arch/arm/boot/dts/renesas/r8a7793.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7793.dtsi
@@ -326,6 +326,64 @@  irqc0: interrupt-controller@e61c0000 {
 			resets = <&cpg 407>;
 		};
 
+		tmu0: timer@e61e0000 {
+			compatible = "renesas,tmu-r8a7793", "renesas,tmu";
+			reg = <0 0xe61e0000 0 0x30>;
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 125>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+			resets = <&cpg 125>;
+			status = "disabled";
+		};
+
+		tmu1: timer@fff60000 {
+			compatible = "renesas,tmu-r8a7793", "renesas,tmu";
+			reg = <0 0xfff60000 0 0x30>;
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 111>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+			resets = <&cpg 111>;
+			status = "disabled";
+		};
+
+		tmu2: timer@fff70000 {
+			compatible = "renesas,tmu-r8a7793", "renesas,tmu";
+			reg = <0 0xfff70000 0 0x30>;
+			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 122>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+			resets = <&cpg 122>;
+			status = "disabled";
+		};
+
+		tmu3: timer@fff80000 {
+			compatible = "renesas,tmu-r8a7793", "renesas,tmu";
+			reg = <0 0xfff80000 0 0x30>;
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 121>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+			resets = <&cpg 121>;
+			status = "disabled";
+		};
+
 		thermal: thermal@e61f0000 {
 			compatible = "renesas,thermal-r8a7793",
 				     "renesas,rcar-gen2-thermal",
diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi
index 371dd4715ddef83d..f37f094cecc8c399 100644
--- a/arch/arm/boot/dts/renesas/r8a7794.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7794.dtsi
@@ -292,6 +292,64 @@  irqc0: interrupt-controller@e61c0000 {
 			resets = <&cpg 407>;
 		};
 
+		tmu0: timer@e61e0000 {
+			compatible = "renesas,tmu-r8a7794", "renesas,tmu";
+			reg = <0 0xe61e0000 0 0x30>;
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 125>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+			resets = <&cpg 125>;
+			status = "disabled";
+		};
+
+		tmu1: timer@fff60000 {
+			compatible = "renesas,tmu-r8a7794", "renesas,tmu";
+			reg = <0 0xfff60000 0 0x30>;
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 111>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+			resets = <&cpg 111>;
+			status = "disabled";
+		};
+
+		tmu2: timer@fff70000 {
+			compatible = "renesas,tmu-r8a7794", "renesas,tmu";
+			reg = <0 0xfff70000 0 0x30>;
+			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+			clocks = <&cpg CPG_MOD 122>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+			resets = <&cpg 122>;
+			status = "disabled";
+		};
+
+		tmu3: timer@fff80000 {
+			compatible = "renesas,tmu-r8a7794", "renesas,tmu";
+			reg = <0 0xfff80000 0 0x30>;
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "tuni0", "tuni1", "tuni2";
+			clocks = <&cpg CPG_MOD 121>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+			resets = <&cpg 121>;
+			status = "disabled";
+		};
+
 		ipmmu_sy0: iommu@e6280000 {
 			compatible = "renesas,ipmmu-r8a7794",
 				     "renesas,ipmmu-vmsa";