| Message ID | 20240327174544.983-14-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Implemnt vblank sycnhronized mbus joining changes | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Wednesday, March 27, 2024 11:16 PM > To: intel-gfx@lists.freedesktop.org > Subject: [PATCH 13/13] drm/i915: Optimize out redundant dbuf slice updates > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > if the new dbuf slices are a superset of the old dbuf slices then we don't have to > do anything in intel_dbuf_post_plane_update(). Restructure the code to skip such > redundant dbuf slice updates. The main benefit is slightly less confusing logs. Looks Good to me. Reviewed-by: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/skl_watermark.c | 27 +++++++++++++------- > 1 file changed, 18 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c > b/drivers/gpu/drm/i915/display/skl_watermark.c > index 1b48009efe2b..50ec51065118 100644 > --- a/drivers/gpu/drm/i915/display/skl_watermark.c > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c > @@ -3788,16 +3788,20 @@ void intel_dbuf_pre_plane_update(struct > intel_atomic_state *state) > intel_atomic_get_new_dbuf_state(state); > const struct intel_dbuf_state *old_dbuf_state = > intel_atomic_get_old_dbuf_state(state); > + u8 old_slices, new_slices; > > - if (!new_dbuf_state || > - new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices) > + if (!new_dbuf_state) > + return; > + > + old_slices = old_dbuf_state->enabled_slices; > + new_slices = old_dbuf_state->enabled_slices | > +new_dbuf_state->enabled_slices; > + > + if (old_slices == new_slices) > return; > > WARN_ON(!new_dbuf_state->base.changed); > > - gen9_dbuf_slices_update(i915, > - old_dbuf_state->enabled_slices | > - new_dbuf_state->enabled_slices); > + gen9_dbuf_slices_update(i915, new_slices); > } > > void intel_dbuf_post_plane_update(struct intel_atomic_state *state) @@ - > 3807,15 +3811,20 @@ void intel_dbuf_post_plane_update(struct > intel_atomic_state *state) > intel_atomic_get_new_dbuf_state(state); > const struct intel_dbuf_state *old_dbuf_state = > intel_atomic_get_old_dbuf_state(state); > + u8 old_slices, new_slices; > > - if (!new_dbuf_state || > - new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices) > + if (!new_dbuf_state) > + return; > + > + old_slices = old_dbuf_state->enabled_slices | new_dbuf_state- > >enabled_slices; > + new_slices = new_dbuf_state->enabled_slices; > + > + if (old_slices == new_slices) > return; > > WARN_ON(!new_dbuf_state->base.changed); > > - gen9_dbuf_slices_update(i915, > - new_dbuf_state->enabled_slices); > + gen9_dbuf_slices_update(i915, new_slices); > } > > static int skl_watermark_ipc_status_show(struct seq_file *m, void *data) > -- > 2.43.2
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 1b48009efe2b..50ec51065118 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -3788,16 +3788,20 @@ void intel_dbuf_pre_plane_update(struct intel_atomic_state *state) intel_atomic_get_new_dbuf_state(state); const struct intel_dbuf_state *old_dbuf_state = intel_atomic_get_old_dbuf_state(state); + u8 old_slices, new_slices; - if (!new_dbuf_state || - new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices) + if (!new_dbuf_state) + return; + + old_slices = old_dbuf_state->enabled_slices; + new_slices = old_dbuf_state->enabled_slices | new_dbuf_state->enabled_slices; + + if (old_slices == new_slices) return; WARN_ON(!new_dbuf_state->base.changed); - gen9_dbuf_slices_update(i915, - old_dbuf_state->enabled_slices | - new_dbuf_state->enabled_slices); + gen9_dbuf_slices_update(i915, new_slices); } void intel_dbuf_post_plane_update(struct intel_atomic_state *state) @@ -3807,15 +3811,20 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state) intel_atomic_get_new_dbuf_state(state); const struct intel_dbuf_state *old_dbuf_state = intel_atomic_get_old_dbuf_state(state); + u8 old_slices, new_slices; - if (!new_dbuf_state || - new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices) + if (!new_dbuf_state) + return; + + old_slices = old_dbuf_state->enabled_slices | new_dbuf_state->enabled_slices; + new_slices = new_dbuf_state->enabled_slices; + + if (old_slices == new_slices) return; WARN_ON(!new_dbuf_state->base.changed); - gen9_dbuf_slices_update(i915, - new_dbuf_state->enabled_slices); + gen9_dbuf_slices_update(i915, new_slices); } static int skl_watermark_ipc_status_show(struct seq_file *m, void *data)