| Message ID | 20240324-imx95-blk-ctl-v5-1-7a706174078a@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support i.MX95 BLK CTL module clock features | expand |
On 24/03/2024 08:52, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in > VPUMIX, CAMERA_CSR in CAMERAMIX and etc. > > The BLK CTL module is used for various settings of a specific MIX, such > as clock, QoS and etc. > > This patch is to add some BLK CTL modules that has clock features. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > .../bindings/clock/nxp,imx95-blk-ctl.yaml | 56 ++++++++++++++++++++++ > 1 file changed, 56 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml > new file mode 100644 > index 000000000000..2dffc02dcd8b > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/nxp,imx95-blk-ctl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX95 Block Control > + > +maintainers: > + - Peng Fan <peng.fan@nxp.com> > + > +properties: > + compatible: > + items: > + - enum: > + - nxp,imx95-lvds-csr > + - nxp,imx95-display-csr > + - nxp,imx95-camera-csr > + - nxp,imx95-vpu-csr > + - const: syscon > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + description: > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See > + include/dt-bindings/clock/nxp,imx95-clock.h In such case, put header as your first patch in the patchset. I don't understand why it was split in the first place... Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
> Subject: Re: [PATCH v5 1/4] dt-bindings: clock: support i.MX95 BLK CTL > module > > On 24/03/2024 08:52, Peng Fan (OSS) wrote: > > From: Peng Fan <peng.fan@nxp.com> > > > > i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in > > VPUMIX, CAMERA_CSR in CAMERAMIX and etc. > > > > The BLK CTL module is used for various settings of a specific MIX, > > such as clock, QoS and etc. > > > > This patch is to add some BLK CTL modules that has clock features. > > > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > > --- > > .../bindings/clock/nxp,imx95-blk-ctl.yaml | 56 > ++++++++++++++++++++++ > > 1 file changed, 56 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml > > b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml > > new file mode 100644 > > index 000000000000..2dffc02dcd8b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml > > @@ -0,0 +1,56 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi > > +cetree.org%2Fschemas%2Fclock%2Fnxp%2Cimx95-blk- > ctl.yaml%23&data=05%7C > > > +02%7Cpeng.fan%40nxp.com%7Cd713a861f155495c922a08dc4d01346d%7 > C686ea1d3 > > > +bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638469914764776121%7CUnk > nown%7CTWF > > > +pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJX > VCI6 > > > +Mn0%3D%7C0%7C%7C%7C&sdata=rW7%2BGedk3bloLsAqBIkMlXQNjDmRd > Z0cHacQtKxjc > > +mQ%3D&reserved=0 > > +$schema: > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi > > +cetree.org%2Fmeta- > schemas%2Fcore.yaml%23&data=05%7C02%7Cpeng.fan%40nx > > > +p.com%7Cd713a861f155495c922a08dc4d01346d%7C686ea1d3bc2b4c6fa9 > 2cd99c5c > > > +301635%7C0%7C0%7C638469914764787067%7CUnknown%7CTWFpbGZs > b3d8eyJWIjoiM > > > +C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7 > C%7C%7 > > > +C&sdata=tFzM3%2BxuQVsit9lCEnNz8kYnZjT%2FXj%2Fdqzk9DB9oy1c%3D&r > eserved > > +=0 > > + > > +title: NXP i.MX95 Block Control > > + > > +maintainers: > > + - Peng Fan <peng.fan@nxp.com> > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - nxp,imx95-lvds-csr > > + - nxp,imx95-display-csr > > + - nxp,imx95-camera-csr > > + - nxp,imx95-vpu-csr > > + - const: syscon > > + > > + reg: > > + maxItems: 1 > > + > > + power-domains: > > + maxItems: 1 > > + > > + clocks: > > + maxItems: 1 > > + > > + '#clock-cells': > > + const: 1 > > + description: > > + The clock consumer should specify the desired clock by having the > clock > > + ID in its "clocks" phandle cell. See > > + include/dt-bindings/clock/nxp,imx95-clock.h > > In such case, put header as your first patch in the patchset. I don't understand > why it was split in the first place... Rob gave a comment in v4, so I split the headers. " If this number can change, then it is not ABI and doesn't go in this header. With that dropped, " https://lore.kernel.org/all/20240315165422.GA1472059-robh@kernel.org/ Thanks, Peng. > > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Best regards, > Krzysztof
On 31/03/2024 13:58, Peng Fan wrote: >>> + const: 1 >>> + description: >>> + The clock consumer should specify the desired clock by having the >> clock >>> + ID in its "clocks" phandle cell. See >>> + include/dt-bindings/clock/nxp,imx95-clock.h >> >> In such case, put header as your first patch in the patchset. I don't understand >> why it was split in the first place... > > Rob gave a comment in v4, so I split the headers. > " > If this number can change, then it is not ABI and doesn't go in this > header. With that dropped, > " Nothing here speaks about splitting headers. Absolutely NOTHING. Rob commented that you added number which can change, thus this is not a binding. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml new file mode 100644 index 000000000000..2dffc02dcd8b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/nxp,imx95-blk-ctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX95 Block Control + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +properties: + compatible: + items: + - enum: + - nxp,imx95-lvds-csr + - nxp,imx95-display-csr + - nxp,imx95-camera-csr + - nxp,imx95-vpu-csr + - const: syscon + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See + include/dt-bindings/clock/nxp,imx95-clock.h + +required: + - compatible + - reg + - '#clock-cells' + - power-domains + - clocks + +additionalProperties: false + +examples: + - | + syscon@4c410000 { + compatible = "nxp,imx95-vpu-csr", "syscon"; + reg = <0x4c410000 0x10000>; + #clock-cells = <1>; + clocks = <&scmi_clk 114>; + power-domains = <&scmi_devpd 21>; + }; +...