diff mbox series

[08/22] drm/i915: Extract glk_need_scaler_clock_gating_wa()

Message ID 20240329011254.24160-9-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Bigjoiner modeset sequence redesign and MST support | expand

Commit Message

Ville Syrjälä March 29, 2024, 1:12 a.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Simplify our life by extracting the "do we need the glk scaler
clock gating w/a?" check into a small helper.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

Comments

Kulkarni, Vandita April 1, 2024, 11:09 a.m. UTC | #1 
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 08/22] drm/i915: Extract glk_need_scaler_clock_gating_wa()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Simplify our life by extracting the "do we need the glk scaler clock gating
> w/a?" check into a small helper.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

LGTM.
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>

>  drivers/gpu/drm/i915/display/intel_display.c | 16 ++++++++++------
>  1 file changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 83474fcf4131..6197b62dac55 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1551,6 +1551,14 @@ static void ilk_crtc_enable(struct
> intel_atomic_state *state,
>  	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);  }
> 
> +/* Display WA #1180: WaDisableScalarClockGating: glk */ static bool
> +glk_need_scaler_clock_gating_wa(const struct intel_crtc_state
> +*crtc_state) {
> +	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
> +
> +	return DISPLAY_VER(i915) == 10 && crtc_state->pch_pfit.enabled; }
> +
>  static void glk_pipe_scaler_clock_gating_wa(struct intel_crtc *crtc, bool
> enable)  {
>  	struct drm_i915_private *i915 = to_i915(crtc->base.dev); @@ -1635,7
> +1643,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
>  	enum pipe hsw_workaround_pipe;
> -	bool psl_clkgate_wa;
> 
>  	if (drm_WARN_ON(&dev_priv->drm, crtc->active))
>  		return;
> @@ -1668,10 +1675,7 @@ static void hsw_crtc_enable(struct
> intel_atomic_state *state,
> 
>  	crtc->active = true;
> 
> -	/* Display WA #1180: WaDisableScalarClockGating: glk */
> -	psl_clkgate_wa = DISPLAY_VER(dev_priv) == 10 &&
> -		new_crtc_state->pch_pfit.enabled;
> -	if (psl_clkgate_wa)
> +	if (glk_need_scaler_clock_gating_wa(new_crtc_state))
>  		glk_pipe_scaler_clock_gating_wa(crtc, true);
> 
>  	if (DISPLAY_VER(dev_priv) >= 9)
> @@ -1702,7 +1706,7 @@ static void hsw_crtc_enable(struct
> intel_atomic_state *state,
> 
>  	intel_encoders_enable(state, crtc);
> 
> -	if (psl_clkgate_wa) {
> +	if (glk_need_scaler_clock_gating_wa(new_crtc_state)) {
>  		intel_crtc_wait_for_next_vblank(crtc);
>  		glk_pipe_scaler_clock_gating_wa(crtc, false);
>  	}
> --
> 2.43.2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 83474fcf4131..6197b62dac55 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1551,6 +1551,14 @@  static void ilk_crtc_enable(struct intel_atomic_state *state,
 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
 }
 
+/* Display WA #1180: WaDisableScalarClockGating: glk */
+static bool glk_need_scaler_clock_gating_wa(const struct intel_crtc_state *crtc_state)
+{
+	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+
+	return DISPLAY_VER(i915) == 10 && crtc_state->pch_pfit.enabled;
+}
+
 static void glk_pipe_scaler_clock_gating_wa(struct intel_crtc *crtc, bool enable)
 {
 	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
@@ -1635,7 +1643,6 @@  static void hsw_crtc_enable(struct intel_atomic_state *state,
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder;
 	enum pipe hsw_workaround_pipe;
-	bool psl_clkgate_wa;
 
 	if (drm_WARN_ON(&dev_priv->drm, crtc->active))
 		return;
@@ -1668,10 +1675,7 @@  static void hsw_crtc_enable(struct intel_atomic_state *state,
 
 	crtc->active = true;
 
-	/* Display WA #1180: WaDisableScalarClockGating: glk */
-	psl_clkgate_wa = DISPLAY_VER(dev_priv) == 10 &&
-		new_crtc_state->pch_pfit.enabled;
-	if (psl_clkgate_wa)
+	if (glk_need_scaler_clock_gating_wa(new_crtc_state))
 		glk_pipe_scaler_clock_gating_wa(crtc, true);
 
 	if (DISPLAY_VER(dev_priv) >= 9)
@@ -1702,7 +1706,7 @@  static void hsw_crtc_enable(struct intel_atomic_state *state,
 
 	intel_encoders_enable(state, crtc);
 
-	if (psl_clkgate_wa) {
+	if (glk_need_scaler_clock_gating_wa(new_crtc_state)) {
 		intel_crtc_wait_for_next_vblank(crtc);
 		glk_pipe_scaler_clock_gating_wa(crtc, false);
 	}