| Message ID | 854994adfdbaafb4d140fffb72ff5ade6b0aeb1e.1712137031.git.oleksii.kurochko@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Enable build of full Xen for RISC-V | expand |
On 03.04.2024 12:19, Oleksii Kurochko wrote: > --- a/xen/include/xen/linux-compat.h > +++ b/xen/include/xen/linux-compat.h > @@ -19,4 +19,6 @@ typedef int64_t __s64; > > typedef paddr_t phys_addr_t; > > +#define __ffs(x) (ffsl(x) - 1) To be truly Linux-compatible, the result type would better be unsigned long here. Seeing that you build upon Andrew's work, the easiest might be #define __ffs(x) (ffsl(x) - 1UL) Then: Reviewed-by: Jan Beulich <jbeulich@suse.com> Jan
Hi Oleksii, On 4/3/24 5:19 AM, Oleksii Kurochko wrote: > The mentioned macros exist only because of Linux compatible purpose. > > The patch defines __ffs() in terms of Xen bitops and it is safe > to define in this way ( as __ffs() - 1 ) as considering that __ffs() > was defined as __builtin_ctzl(x), which has undefined behavior when x=0, > so it is assumed that such cases are not encountered in the current code. > > To not include <xen/linux-compat.h> to Xen library files __ffs() and __ffz() > were defined locally in find-next-bit.c. > > Except __ffs() usage in find-next-bit.c only one usage of __ffs() leave > in smmu-v3.c. It seems that it __ffs can be changed to ffsl(x)-1 in > this file, but to keep smmu-v3.c looks close to linux it was deciced just > to define __ffs() in xen/linux-compat.h and include it in smmu-v3.c > > Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> For the PPC part: Acked-by: Shawn Anastasio <sanastasio@raptorengineering.com> Thanks, Shawn
diff --git a/xen/arch/arm/include/asm/arm64/bitops.h b/xen/arch/arm/include/asm/arm64/bitops.h index 5f5d97faa0..2deb134388 100644 --- a/xen/arch/arm/include/asm/arm64/bitops.h +++ b/xen/arch/arm/include/asm/arm64/bitops.h @@ -1,27 +1,6 @@ #ifndef _ARM_ARM64_BITOPS_H #define _ARM_ARM64_BITOPS_H -/* Based on linux/include/asm-generic/bitops/builtin-__ffs.h */ -/** - * __ffs - find first bit in word. - * @word: The word to search - * - * Undefined if no bit exists, so code should check against 0 first. - */ -static /*__*/always_inline unsigned long __ffs(unsigned long word) -{ - return __builtin_ctzl(word); -} - -/* Based on linux/include/asm-generic/bitops/ffz.h */ -/* - * ffz - find first zero in word. - * @word: The word to search - * - * Undefined if no zero exists, so code should check against ~0UL first. - */ -#define ffz(x) __ffs(~(x)) - static inline int arch_flsl(unsigned long x) { uint64_t ret; diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/bitops.h index a17060c7c2..2237b9f8f4 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -130,16 +130,4 @@ static inline int test_and_set_bit(unsigned int nr, volatile void *addr) #define hweight16(x) __builtin_popcount((uint16_t)(x)) #define hweight8(x) __builtin_popcount((uint8_t)(x)) -/* Based on linux/include/asm-generic/bitops/builtin-__ffs.h */ -/** - * __ffs - find first bit in word. - * @word: The word to search - * - * Undefined if no bit exists, so code should check against 0 first. - */ -static always_inline unsigned long __ffs(unsigned long word) -{ - return __builtin_ctzl(word); -} - #endif /* _ASM_PPC_BITOPS_H */ diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c index b1c40c2c0a..6904962467 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -72,12 +72,14 @@ */ #include <xen/acpi.h> +#include <xen/bitops.h> #include <xen/config.h> #include <xen/delay.h> #include <xen/errno.h> #include <xen/err.h> #include <xen/irq.h> #include <xen/lib.h> +#include <xen/linux-compat.h> #include <xen/list.h> #include <xen/mm.h> #include <xen/rbtree.h> diff --git a/xen/include/xen/linux-compat.h b/xen/include/xen/linux-compat.h index 62ba71485c..10db80df57 100644 --- a/xen/include/xen/linux-compat.h +++ b/xen/include/xen/linux-compat.h @@ -19,4 +19,6 @@ typedef int64_t __s64; typedef paddr_t phys_addr_t; +#define __ffs(x) (ffsl(x) - 1) + #endif /* __XEN_LINUX_COMPAT_H__ */ diff --git a/xen/lib/find-next-bit.c b/xen/lib/find-next-bit.c index ca6f82277e..761b027398 100644 --- a/xen/lib/find-next-bit.c +++ b/xen/lib/find-next-bit.c @@ -12,6 +12,9 @@ #include <asm/byteorder.h> +#define __ffs(x) (ffsl(x) - 1) +#define ffz(x) __ffs(~(x)) + #ifndef find_next_bit /* * Find the next set bit in a memory region.
The mentioned macros exist only because of Linux compatible purpose. The patch defines __ffs() in terms of Xen bitops and it is safe to define in this way ( as __ffs() - 1 ) as considering that __ffs() was defined as __builtin_ctzl(x), which has undefined behavior when x=0, so it is assumed that such cases are not encountered in the current code. To not include <xen/linux-compat.h> to Xen library files __ffs() and __ffz() were defined locally in find-next-bit.c. Except __ffs() usage in find-next-bit.c only one usage of __ffs() leave in smmu-v3.c. It seems that it __ffs can be changed to ffsl(x)-1 in this file, but to keep smmu-v3.c looks close to linux it was deciced just to define __ffs() in xen/linux-compat.h and include it in smmu-v3.c Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> --- Changes in V7: - introduce ffz(),__ffs() locally in find-next-bit.c - drop inclusion of <xen/linux-compat.h> in find-next-bit.c. - update the commit message. --- Changes in V6: - new patch for the patch series. --- xen/arch/arm/include/asm/arm64/bitops.h | 21 --------------------- xen/arch/ppc/include/asm/bitops.h | 12 ------------ xen/drivers/passthrough/arm/smmu-v3.c | 2 ++ xen/include/xen/linux-compat.h | 2 ++ xen/lib/find-next-bit.c | 3 +++ 5 files changed, 7 insertions(+), 33 deletions(-)