diff mbox series

[v5,04/19] drm/i915/psr: Do not update phy power state in case of non-eDP panel replay

Message ID 20240403090013.54296-5-jouni.hogander@intel.com (mailing list archive)
State New, archived
Headers show
Series Panel replay selective update support | expand

Commit Message

Hogander, Jouni April 3, 2024, 8:59 a.m. UTC
Currently panel replay is supporting only main link on mode -> Do not
update phy power state for non-eDP panel replay.

Bspec: 53370

v2: use intel_dp_is_edp to differentiate

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

Comments

Manna, Animesh April 5, 2024, 11 a.m. UTC | #1
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, April 3, 2024 2:30 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>
> Subject: [PATCH v5 04/19] drm/i915/psr: Do not update phy power state in
> case of non-eDP panel replay
> 
> Currently panel replay is supporting only main link on mode -> Do not update
> phy power state for non-eDP panel replay.
> 
> Bspec: 53370
> 
> v2: use intel_dp_is_edp to differentiate
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index bd99b9953274..07c1ddec2d86 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1930,13 +1930,16 @@ static void intel_psr_enable_locked(struct
> intel_dp *intel_dp,
>  	if (!psr_interrupt_error_check(intel_dp))
>  		return;
> 
> -	if (intel_dp->psr.panel_replay_enabled)
> +	if (intel_dp->psr.panel_replay_enabled) {
>  		drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
> -	else
> +	} else {
>  		drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
>  			    intel_dp->psr.psr2_enabled ? "2" : "1");
> +	}
> +
> +	if (intel_dp_is_edp(intel_dp))
> +		intel_snps_phy_update_psr_power_state(&dig_port->base,
> true);
> 
> -	intel_snps_phy_update_psr_power_state(&dig_port->base, true);
>  	intel_psr_enable_sink(intel_dp);
>  	intel_psr_enable_source(intel_dp, crtc_state);
>  	intel_dp->psr.enabled = true;
> @@ -2041,7 +2044,8 @@ static void intel_psr_disable_locked(struct intel_dp
> *intel_dp)
>  				     CLKGATE_DIS_MISC_DMASC_GATING_DIS,
> 0);
>  	}
> 
> -
> 	intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)
> ->base, false);
> +	if (intel_dp_is_edp(intel_dp))
> +
> +intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)-
> >base,
> +false);
> 
>  	/* Panel Replay on eDP is always using ALPM aux less. */
>  	if (intel_dp->psr.panel_replay_enabled &&
> intel_dp_is_edp(intel_dp)) {
> --
> 2.34.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bd99b9953274..07c1ddec2d86 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1930,13 +1930,16 @@  static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 	if (!psr_interrupt_error_check(intel_dp))
 		return;
 
-	if (intel_dp->psr.panel_replay_enabled)
+	if (intel_dp->psr.panel_replay_enabled) {
 		drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
-	else
+	} else {
 		drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
 			    intel_dp->psr.psr2_enabled ? "2" : "1");
+	}
+
+	if (intel_dp_is_edp(intel_dp))
+		intel_snps_phy_update_psr_power_state(&dig_port->base, true);
 
-	intel_snps_phy_update_psr_power_state(&dig_port->base, true);
 	intel_psr_enable_sink(intel_dp);
 	intel_psr_enable_source(intel_dp, crtc_state);
 	intel_dp->psr.enabled = true;
@@ -2041,7 +2044,8 @@  static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 				     CLKGATE_DIS_MISC_DMASC_GATING_DIS, 0);
 	}
 
-	intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false);
+	if (intel_dp_is_edp(intel_dp))
+		intel_snps_phy_update_psr_power_state(&dp_to_dig_port(intel_dp)->base, false);
 
 	/* Panel Replay on eDP is always using ALPM aux less. */
 	if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {