| Message ID | 20240404122559.898930-15-peter.griffin@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | HSI2, UFS & UFS phy support for Tensor GS101 | expand |
On 04/04/2024 14:25, Peter Griffin wrote: > Platforms such as Tensor gs101 the pclk frequency is 267Mhz. > Increase PCLK_AVAIL_MAX so we don't fail the frequency check. > > Signed-off-by: Peter Griffin <peter.griffin@linaro.org> > --- Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof
On 04/04/2024, Peter Griffin wrote: > Platforms such as Tensor gs101 the pclk frequency is 267Mhz. > Increase PCLK_AVAIL_MAX so we don't fail the frequency check. > > Signed-off-by: Peter Griffin <peter.griffin@linaro.org> > --- Tested-by: Will McVicker <willmcvicker@google.com> I tested this patch series on a Pixel 6 device. I was able to successfully mount two of the Android ext4 partitions -- efs and metadata. root@google-gs:~# mount | grep /dev/sda /dev/sda5 on /mnt/efs type ext4 (rw,relatime) /dev/sda8 on /mnt/metadata type ext4 (rw,relatime) Regards, Will
diff --git a/drivers/ufs/host/ufs-exynos.h b/drivers/ufs/host/ufs-exynos.h index acf07cc54684..7acc13914100 100644 --- a/drivers/ufs/host/ufs-exynos.h +++ b/drivers/ufs/host/ufs-exynos.h @@ -116,7 +116,7 @@ struct exynos_ufs; #define PA_HIBERN8TIME_VAL 0x20 #define PCLK_AVAIL_MIN 70000000 -#define PCLK_AVAIL_MAX 167000000 +#define PCLK_AVAIL_MAX 267000000 struct exynos_ufs_uic_attr { /* TX Attributes */
Platforms such as Tensor gs101 the pclk frequency is 267Mhz. Increase PCLK_AVAIL_MAX so we don't fail the frequency check. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> --- drivers/ufs/host/ufs-exynos.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)