| Message ID | 20240329053130.2822129-1-c-vankar@ti.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add CPSW2G and CPSW9G nodes for J784S4 | expand |
Hi Chintan, On 29/03/24 11:01 am, Chintan Vankar wrote: > This series adds device-tree nodes for CPSW2G and CPSW9G instance > of the CPSW Ethernet Switch on TI's J784S4 SoC. Additionally, > two device-tree overlays are also added: > 1. QSGMII mode with the CPSW9G instance via the ENET EXPANSION 1 > connector. > 2. USXGMII mode with MAC Ports 1 and 2 of the CPSW9G instance via > ENET EXPANSION 1 and 2 connectors, configured in fixed-link > mode of operation at 5Gbps link speed. > > Link to v5: > https://lore.kernel.org/r/20240314072129.1520475-1-c-vankar@ti.com/ > > Changes from v5 to v6: > - Updated order of properties in Device Nodes based on > https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node > > Chintan Vankar (1): > arm64: dts: ti: k3-j784s4-evm: Add alias for MCU CPSW2G > > Siddharth Vadapalli (4): > arm64: dts: ti: k3-j784s4-main: Add CPSW2G and CPSW9G nodes > arm64: dts: ti: k3-j784s4-evm: Enable Main CPSW2G node and add aliases > for it > arm64: dts: ti: k3-j784s4: Add overlay to enable QSGMII mode with > CPSW9G > arm64: dts: ti: k3-j784s4: Add overlay for dual port USXGMII mode > > arch/arm64/boot/dts/ti/Makefile | 11 +- > .../ti/k3-j784s4-evm-quad-port-eth-exp1.dtso | 147 ++++++++++++++ > .../ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso | 81 ++++++++ > arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 51 +++++ > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 187 ++++++++++++++++++ > 5 files changed, 476 insertions(+), 1 deletion(-) > create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso > create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso > For this series, Reviewed-by: MD Danish Anwar <danishanwar@ti.com>
Hi Chintan Vankar, On Fri, 29 Mar 2024 11:01:25 +0530, Chintan Vankar wrote: > This series adds device-tree nodes for CPSW2G and CPSW9G instance > of the CPSW Ethernet Switch on TI's J784S4 SoC. Additionally, > two device-tree overlays are also added: > 1. QSGMII mode with the CPSW9G instance via the ENET EXPANSION 1 > connector. > 2. USXGMII mode with MAC Ports 1 and 2 of the CPSW9G instance via > ENET EXPANSION 1 and 2 connectors, configured in fixed-link > mode of operation at 5Gbps link speed. > > [...] I have applied the following to branch ti-k3-dts-next on [1]. Thank you! [1/5] arm64: dts: ti: k3-j784s4-evm: Add alias for MCU CPSW2G commit: 4670135ec39545e47f2602853dd321bc5f2bc4b7 [2/5] arm64: dts: ti: k3-j784s4-main: Add CPSW2G and CPSW9G nodes commit: 290b341499fc5c40839141c12d1b4d9cfe4484a6 [3/5] arm64: dts: ti: k3-j784s4-evm: Enable Main CPSW2G node and add aliases for it commit: 6f2133e6b46b8b499fc23a890756a44c6c434423 [4/5] arm64: dts: ti: k3-j784s4: Add overlay to enable QSGMII mode with CPSW9G commit: fb55df5a6b69702f79023b93d0c38cc6d749eba3 [5/5] arm64: dts: ti: k3-j784s4: Add overlay for dual port USXGMII mode commit: 385afb85589e354853234ed68a0600276dcd77ad All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
This series adds device-tree nodes for CPSW2G and CPSW9G instance of the CPSW Ethernet Switch on TI's J784S4 SoC. Additionally, two device-tree overlays are also added: 1. QSGMII mode with the CPSW9G instance via the ENET EXPANSION 1 connector. 2. USXGMII mode with MAC Ports 1 and 2 of the CPSW9G instance via ENET EXPANSION 1 and 2 connectors, configured in fixed-link mode of operation at 5Gbps link speed. Link to v5: https://lore.kernel.org/r/20240314072129.1520475-1-c-vankar@ti.com/ Changes from v5 to v6: - Updated order of properties in Device Nodes based on https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node Chintan Vankar (1): arm64: dts: ti: k3-j784s4-evm: Add alias for MCU CPSW2G Siddharth Vadapalli (4): arm64: dts: ti: k3-j784s4-main: Add CPSW2G and CPSW9G nodes arm64: dts: ti: k3-j784s4-evm: Enable Main CPSW2G node and add aliases for it arm64: dts: ti: k3-j784s4: Add overlay to enable QSGMII mode with CPSW9G arm64: dts: ti: k3-j784s4: Add overlay for dual port USXGMII mode arch/arm64/boot/dts/ti/Makefile | 11 +- .../ti/k3-j784s4-evm-quad-port-eth-exp1.dtso | 147 ++++++++++++++ .../ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso | 81 ++++++++ arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 51 +++++ arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 187 ++++++++++++++++++ 5 files changed, 476 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso