| Message ID | 20240417112003.428348-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | e58d8e885b4e937145a96cd94bc890c2134ff640 |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: rzg3s-smarc-som: Enable eMMC by default | expand |
On 17.04.2024 14:20, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Enable eMMC by default on the RZ/G3S SMARC platform, as previously done > on RZ/G2L boards and other Renesas platforms. > > The SW_CONFIG2 setting selects between the uSD0 card and eMMC. By setting > SW_CONFIG2 to SW_OFF, we select eMMC by default. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi > index 1f87150a2e0a..8a3d302f1535 100644 > --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi > @@ -25,7 +25,7 @@ > * SW_OFF - SD2 is connected to SoC > * SW_ON - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC > */ > -#define SW_CONFIG2 SW_ON > +#define SW_CONFIG2 SW_OFF > #define SW_CONFIG3 SW_ON > > / {
On Wed, Apr 17, 2024 at 1:20 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Enable eMMC by default on the RZ/G3S SMARC platform, as previously done > on RZ/G2L boards and other Renesas platforms. > > The SW_CONFIG2 setting selects between the uSD0 card and eMMC. By setting > SW_CONFIG2 to SW_OFF, we select eMMC by default. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.10. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 1f87150a2e0a..8a3d302f1535 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -25,7 +25,7 @@ * SW_OFF - SD2 is connected to SoC * SW_ON - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC */ -#define SW_CONFIG2 SW_ON +#define SW_CONFIG2 SW_OFF #define SW_CONFIG3 SW_ON / {