Message ID | 1711725718-6362-3-git-send-email-quic_msarkar@quicinc.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Krzysztof WilczyĆski |
Headers | show |
Series | arm64: qcom: sa8775p: add support for EP PCIe | expand |
On 3/29/24 16:21, Mrinmay Sarkar wrote: > Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller > driver. Adding new compatible string as it has different set of clocks > compared to other SoCs. So is it the only change after all? What did we conclude on the NO_SNOOP saga? If the difference is only in the consumed clocks (and they're only supposed to be "on" with no special handling), I don't think a separate compatible is necessary at all Konrad
On 4/23/2024 6:38 PM, Konrad Dybcio wrote: > > > On 3/29/24 16:21, Mrinmay Sarkar wrote: >> Add support for SA8775P SoC to the Qualcomm PCIe Endpoint Controller >> driver. Adding new compatible string as it has different set of clocks >> compared to other SoCs. > > So is it the only change after all? What did we conclude on the NO_SNOOP > saga? > > If the difference is only in the consumed clocks (and they're only > supposed > to be "on" with no special handling), I don't think a separate compatible > is necessary at all > > Konrad Hi Konrad, Thanks for review. yes, we are going with the NO_SNOOP change for this platform. And that series has been reviewed and waiting for this patch to get applied. Thanks, Mrinmay
diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 36e5e80..45008e0 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -875,6 +875,7 @@ static void qcom_pcie_ep_remove(struct platform_device *pdev) } static const struct of_device_id qcom_pcie_ep_match[] = { + { .compatible = "qcom,sa8775p-pcie-ep", }, { .compatible = "qcom,sdx55-pcie-ep", }, { .compatible = "qcom,sm8450-pcie-ep", }, { }