| Message ID | 20240424072912.43188-1-lei4.wang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/i386: Introduce SapphireRapids-v3 to add missing features | expand |
Queued, thanks. Paolo
On Wed, Apr 24, 2024 at 04:33:11PM +0800, Zhao Liu wrote: > Hi Lei, > > On Wed, Apr 24, 2024 at 03:29:12AM -0400, Lei Wang wrote: > > Date: Wed, 24 Apr 2024 03:29:12 -0400 > > From: Lei Wang <lei4.wang@intel.com> > > Subject: [PATCH] target/i386: Introduce SapphireRapids-v3 to add missing > > features > > X-Mailer: git-send-email 2.39.3 > > > > Add the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) in > > the SapphireRapids-v3 CPU model. > > Considering that these are missing features, not hardware updates/fixes/Linux > support changes, then as opposed to adding v3, it would be more appropriate > to add these flags directly to the v1 SPR model with Fixes tag (Fixes: > commit 7eb061b06e97 ("i386: Add new CPU model SapphireRapids")). That would break compatibility with v1 CPU models from existing releases of QEMU. Once released, a CPU version is read-only to preserve compatibility, which is why we have the CPU versioning concept. With regards, Daniel
Hi Lei, On Wed, Apr 24, 2024 at 03:29:12AM -0400, Lei Wang wrote: > Date: Wed, 24 Apr 2024 03:29:12 -0400 > From: Lei Wang <lei4.wang@intel.com> > Subject: [PATCH] target/i386: Introduce SapphireRapids-v3 to add missing > features > X-Mailer: git-send-email 2.39.3 > > Add the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) in > the SapphireRapids-v3 CPU model. Considering that these are missing features, not hardware updates/fixes/Linux support changes, then as opposed to adding v3, it would be more appropriate to add these flags directly to the v1 SPR model with Fixes tag (Fixes: commit 7eb061b06e97 ("i386: Add new CPU model SapphireRapids")). Regards, Zhao
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fd6af0d763..77e7945152 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3970,6 +3970,17 @@ static const X86CPUDefinition builtin_x86_defs[] = { { /* end of list */ } } }, + { + .version = 3, + .props = (PropValue[]) { + { "ss", "on" }, + { "tsc-adjust", "on" }, + { "cldemote", "on" }, + { "movdiri", "on" }, + { "movdir64b", "on" }, + { /* end of list */ } + } + }, { /* end of list */ } } },
Add the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) in the SapphireRapids-v3 CPU model. Signed-off-by: Lei Wang <lei4.wang@intel.com> --- target/i386/cpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+)