| Message ID | 20240422105355.1622177-1-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | clk: renesas: rzg2l: Add support for power domains | expand |
Hi Ulf, On Mon, Apr 22, 2024 at 12:54 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Series adds support for power domains on rzg2l driver. > > RZ/G2L kind of devices support a functionality called MSTOP (module > stop/standby). According to hardware manual the module could be switch > to standby after its clocks are disabled. The reverse order of operation > should be done when enabling a module (get the module out of standby, > enable its clocks etc). > > In [1] the MSTOP settings were implemented by adding code in driver > to attach the MSTOP state to the IP clocks. But it has been proposed > to implement it as power domain. The result is this series. > > The DT bindings were updated with power domain IDs (plain integers > that matches the DT with driver data structures). The current DT > bindings were updated with module IDs for the modules listed in tables > with name "Registers for Module Standby Mode" (see HW manual) exception > being RZ/G3S where, due to the power down functionality, the DDR, > TZCDDR, OTFDE_DDR were also added. > > Domain IDs were added to all SoC specific bindings. > > Thank you, > Claudiu Beznea > > Changes in v4: > - dropped the pwrdn functionality until it is better understanded > - dropped patch "clk: renesas: rzg2l-cpg: Add suspend/resume > support for power domains" from v3; this will be replaced > by propertly calling device_set_wakup_path() in serial console > driver > - instantiated the watchdog domain in r8a08g045 clock driver; this > allow applying r9a08g045 clock patch w/o affecting watchdog and later, > after all good with watchdog patches series at [2], only patch > "arm64: dts: renesas: r9a08g045: Update #power-domain-cells = <1>" > will need to be applied Are you happy with this series? I would like to queue patches 1-7 in renesas-clk for v6.10 (i.e. this week). Thank you! Gr{oetje,eeting}s, Geert
On Wed, 24 Apr 2024 at 16:34, Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Ulf, > > On Mon, Apr 22, 2024 at 12:54 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > > > Series adds support for power domains on rzg2l driver. > > > > RZ/G2L kind of devices support a functionality called MSTOP (module > > stop/standby). According to hardware manual the module could be switch > > to standby after its clocks are disabled. The reverse order of operation > > should be done when enabling a module (get the module out of standby, > > enable its clocks etc). > > > > In [1] the MSTOP settings were implemented by adding code in driver > > to attach the MSTOP state to the IP clocks. But it has been proposed > > to implement it as power domain. The result is this series. > > > > The DT bindings were updated with power domain IDs (plain integers > > that matches the DT with driver data structures). The current DT > > bindings were updated with module IDs for the modules listed in tables > > with name "Registers for Module Standby Mode" (see HW manual) exception > > being RZ/G3S where, due to the power down functionality, the DDR, > > TZCDDR, OTFDE_DDR were also added. > > > > Domain IDs were added to all SoC specific bindings. > > > > Thank you, > > Claudiu Beznea > > > > Changes in v4: > > - dropped the pwrdn functionality until it is better understanded > > - dropped patch "clk: renesas: rzg2l-cpg: Add suspend/resume > > support for power domains" from v3; this will be replaced > > by propertly calling device_set_wakup_path() in serial console > > driver > > - instantiated the watchdog domain in r8a08g045 clock driver; this > > allow applying r9a08g045 clock patch w/o affecting watchdog and later, > > after all good with watchdog patches series at [2], only patch > > "arm64: dts: renesas: r9a08g045: Update #power-domain-cells = <1>" > > will need to be applied > > Are you happy with this series? I would like to queue patches 1-7 in > renesas-clk for v6.10 (i.e. this week). Yes, the series looks good to me! For the series, feel free to add: Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Kind regards Uffe
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Hi, Series adds support for power domains on rzg2l driver. RZ/G2L kind of devices support a functionality called MSTOP (module stop/standby). According to hardware manual the module could be switch to standby after its clocks are disabled. The reverse order of operation should be done when enabling a module (get the module out of standby, enable its clocks etc). In [1] the MSTOP settings were implemented by adding code in driver to attach the MSTOP state to the IP clocks. But it has been proposed to implement it as power domain. The result is this series. The DT bindings were updated with power domain IDs (plain integers that matches the DT with driver data structures). The current DT bindings were updated with module IDs for the modules listed in tables with name "Registers for Module Standby Mode" (see HW manual) exception being RZ/G3S where, due to the power down functionality, the DDR, TZCDDR, OTFDE_DDR were also added. Domain IDs were added to all SoC specific bindings. Thank you, Claudiu Beznea Changes in v4: - dropped the pwrdn functionality until it is better understanded - dropped patch "clk: renesas: rzg2l-cpg: Add suspend/resume support for power domains" from v3; this will be replaced by propertly calling device_set_wakup_path() in serial console driver - instantiated the watchdog domain in r8a08g045 clock driver; this allow applying r9a08g045 clock patch w/o affecting watchdog and later, after all good with watchdog patches series at [2], only patch "arm64: dts: renesas: r9a08g045: Update #power-domain-cells = <1>" will need to be applied Changes in v3: - collected tags - dinamically detect if a SCIF is serial console and populate pd->suspend_check - dropped patch 09/10 from v2 Changes in v2: - addressed review comments - dropped: - dt-bindings: clock: r9a09g011-cpg: Add always-on power domain IDs - clk: renesas: r9a07g043: Add initial support for power domains - clk: renesas: r9a07g044: Add initial support for power domains - clk: renesas: r9a09g011: Add initial support for power domains - clk: renesas: r9a09g011: Add initial support for power domains - arm64: dts: renesas: r9a07g043: Update #power-domain-cells = <1> - arm64: dts: renesas: r9a07g044: Update #power-domain-cells = <1> - arm64: dts: renesas: r9a07g054: Update #power-domain-cells = <1> - arm64: dts: renesas: r9a09g011: Update #power-domain-cells = <1> as suggested in the review process - dropped "arm64: dts: renesas: rzg3s-smarc-som: Guard the ethernet IRQ GPIOs with proper flags" patch as it was integrated - added suspend to RAM support - collected tag [1] https://lore.kernel.org/all/20231120070024.4079344-4-claudiu.beznea.uj@bp.renesas.com/ [2] https://lore.kernel.org/all/20240410134044.2138310-1-claudiu.beznea.uj@bp.renesas.com/ Claudiu Beznea (8): dt-bindings: clock: r9a07g043-cpg: Add power domain IDs dt-bindings: clock: r9a07g044-cpg: Add power domain IDs dt-bindings: clock: r9a07g054-cpg: Add power domain IDs dt-bindings: clock: r9a08g045-cpg: Add power domain IDs dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> for RZ/G3S clk: renesas: rzg2l: Extend power domain support clk: renesas: r9a08g045: Add support for power domains arm64: dts: renesas: r9a08g045: Update #power-domain-cells = <1> .../bindings/clock/renesas,rzg2l-cpg.yaml | 18 +- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 20 +- drivers/clk/renesas/r9a08g045-cpg.c | 41 ++++ drivers/clk/renesas/rzg2l-cpg.c | 199 ++++++++++++++++-- drivers/clk/renesas/rzg2l-cpg.h | 67 ++++++ include/dt-bindings/clock/r9a07g043-cpg.h | 52 +++++ include/dt-bindings/clock/r9a07g044-cpg.h | 58 +++++ include/dt-bindings/clock/r9a07g054-cpg.h | 58 +++++ include/dt-bindings/clock/r9a08g045-cpg.h | 70 ++++++ 9 files changed, 558 insertions(+), 25 deletions(-)