| Message ID | 20240426-hsi0-gs101-v2-2-2157da8b63e3@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | HSI0 and HSI2 support for Google Tensor gs101 | expand |
On Fri, 26 Apr 2024 11:03:05 +0100, André Draszik wrote: > Enable the cmu-hsi0 clock controller. It feeds USB. > > Applied, thanks! [2/5] arm64: dts: exynos: gs101: enable cmu-hsi0 clock controller https://git.kernel.org/krzk/linux/c/ea88ccc17f156e9fe937812091d80fb501aeec4b Best regards,
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index eddb6b326fde..9755a0bb70a1 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1247,6 +1247,20 @@ spi_13: spi@10d60000 { }; }; + cmu_hsi0: clock-controller@11000000 { + compatible = "google,gs101-cmu-hsi0"; + reg = <0x11000000 0x4000>; + #clock-cells = <1>; + + clocks = <&ext_24_5m>, + <&cmu_top CLK_DOUT_CMU_HSI0_BUS>, + <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>, + <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>, + <&cmu_top CLK_DOUT_CMU_HSI0_USBDPDBG>; + clock-names = "oscclk", "bus", "dpgtc", "usb31drd", + "usbdpdbg"; + }; + pinctrl_hsi1: pinctrl@11840000 { compatible = "google,gs101-pinctrl"; reg = <0x11840000 0x00001000>;
Enable the cmu-hsi0 clock controller. It feeds USB. Signed-off-by: André Draszik <andre.draszik@linaro.org> --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)