Message ID | 20240429001317.432-7-jszhang@kernel.org (mailing list archive) |
---|---|
State | Accepted |
Headers | show |
Series | riscv: dts: starfive: add Milkv Mars board device tree | expand |
Context | Check | Description |
---|---|---|
conchuod/vmtest-fixes-PR | fail | merge-conflict |
Jisheng Zhang wrote: > No physical write-protect line is present, so setting "disable-wp". > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > --- > arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > index b6030d63459d..e19f26628054 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > @@ -304,6 +304,7 @@ &mmc1 { > no-sdio; > no-mmc; > cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; > + disable-wp; Same nit as patch 5/6, but in any case: Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> > cap-sd-highspeed; > post-power-on-delay-ms = <200>; > pinctrl-names = "default"; > -- > 2.43.0 >
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index b6030d63459d..e19f26628054 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -304,6 +304,7 @@ &mmc1 { no-sdio; no-mmc; cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; + disable-wp; cap-sd-highspeed; post-power-on-delay-ms = <200>; pinctrl-names = "default";
No physical write-protect line is present, so setting "disable-wp". Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 1 + 1 file changed, 1 insertion(+)