Message ID | 20240430083730.134918-1-herve.codina@bootlin.com (mailing list archive) |
---|---|
Headers | show |
Series | Add support for the LAN966x PCI device using a DT overlay | expand |
> -----Original Message----- > From: Herve Codina <herve.codina@bootlin.com> > Sent: Tuesday, April 30, 2024 2:07 PM > To: Herve Codina <herve.codina@bootlin.com>; Thomas Gleixner > <tglx@linutronix.de>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski > <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; David S. Miller > <davem@davemloft.net>; Eric Dumazet <edumazet@google.com>; Jakub > Kicinski <kuba@kernel.org>; Paolo Abeni <pabeni@redhat.com>; Lee Jones > <lee@kernel.org>; Arnd Bergmann <arnd@arndb.de>; Horatiu Vultur > <horatiu.vultur@microchip.com>; UNGLinuxDriver@microchip.com; Andrew > Lunn <andrew@lunn.ch>; Heiner Kallweit <hkallweit1@gmail.com>; Russell > King <linux@armlinux.org.uk>; Saravana Kannan <saravanak@google.com>; > Bjorn Helgaas <bhelgaas@google.com>; Philipp Zabel > <p.zabel@pengutronix.de>; Lars Povlsen <lars.povlsen@microchip.com>; > Steen Hegelund <Steen.Hegelund@microchip.com>; Daniel Machon > <daniel.machon@microchip.com>; Alexandre Belloni > <alexandre.belloni@bootlin.com> > Cc: linux-kernel@vger.kernel.org; devicetree@vger.kernel.org; > netdev@vger.kernel.org; linux-pci@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; Allan Nielsen <allan.nielsen@microchip.com>; > Steen Hegelund <steen.hegelund@microchip.com>; Luca Ceresoli > <luca.ceresoli@bootlin.com>; Thomas Petazzoni > <thomas.petazzoni@bootlin.com> > Subject: [PATCH 07/17] net: mdio: mscc-miim: Handle the switch > reset > > The mscc-miim device can be impacted by the switch reset, at least when this > device is part of the LAN966x PCI device. > > Handle this newly added (optional) resets property. > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > --- > drivers/net/mdio/mdio-mscc-miim.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/net/mdio/mdio-mscc-miim.c b/drivers/net/mdio/mdio- > mscc-miim.c > index c29377c85307..6a6c1768f533 100644 > --- a/drivers/net/mdio/mdio-mscc-miim.c > +++ b/drivers/net/mdio/mdio-mscc-miim.c > @@ -19,6 +19,7 @@ > #include <linux/platform_device.h> > #include <linux/property.h> > #include <linux/regmap.h> > +#include <linux/reset.h> > > #define MSCC_MIIM_REG_STATUS 0x0 > #define MSCC_MIIM_STATUS_STAT_PENDING BIT(2) > @@ -270,11 +271,18 @@ static int mscc_miim_probe(struct platform_device > *pdev) { > struct device_node *np = pdev->dev.of_node; > struct regmap *mii_regmap, *phy_regmap; > + struct reset_control *reset; Please follow reverse x-mass tree order > struct device *dev = &pdev->dev; > struct mscc_miim_dev *miim; > struct mii_bus *bus; > int ret; > > + reset = devm_reset_control_get_optional_shared(dev, "switch"); > + if (IS_ERR(reset)) > + return dev_err_probe(dev, PTR_ERR(reset), "Failed to get > reset\n"); > + > + reset_control_reset(reset); > + > mii_regmap = ocelot_regmap_from_resource(pdev, 0, > > &mscc_miim_regmap_config); > if (IS_ERR(mii_regmap)) > -- > 2.44.0 >
On Tue, Apr 30, 2024 at 10:37:09AM +0200, Herve Codina wrote: > Hi, > > This series adds support for the LAN966x chip when used as a PCI > device. > This patch series for now adds a Device Tree overlay that describes an > initial subset of the devices available over PCI in the LAN996x, and > follow-up patch series will add support for more once this initial > support has landed. What host systems have you tested with? Are they all native DT, or have you tested on an ACPI system? I'm just wondering how well DT overlay works if i were to plug a LAN966x device into something like an x86 ComExpress board? Andrew
Hi Andrew, On Tue, 30 Apr 2024 15:40:16 +0200 Andrew Lunn <andrew@lunn.ch> wrote: > On Tue, Apr 30, 2024 at 10:37:09AM +0200, Herve Codina wrote: > > Hi, > > > > This series adds support for the LAN966x chip when used as a PCI > > device. > > > This patch series for now adds a Device Tree overlay that describes an > > initial subset of the devices available over PCI in the LAN996x, and > > follow-up patch series will add support for more once this initial > > support has landed. > > What host systems have you tested with? Are they all native DT, or > have you tested on an ACPI system? I'm just wondering how well DT > overlay works if i were to plug a LAN966x device into something like > an x86 ComExpress board? I tested on a native DT system (marvell board). Also I tested on a x86 system (basically a simple PC). Not all components are available upstream to have it working on a x86 (ACPI) system. The missing component is not related to the LAN966x PCI driver itself but in the way DT node are created up to the PCI device. A DT node at PCI device is needed to have a DT node parent (target) for the overlay. The DT node chain is also important because BARs address translations are done using the 'ranges' property available in each node in the chain. On a full DT system, the DT looks like (simplified in naming and without the node properties): / soc { ... pci_root_bridge { <-- Present in base dts pci_to_pci_bridge { <-- Created at runtime based on PCI enumeration pci_device { <-- Created at runtime based on PCI enumeration } } pci_device { <-- Created at runtime based on PCI enumeration }; }; }; On x86: - A DT root empty node is created. This is already upstream from a first proposal [1] and then second one [2]. - PCI-to-PCI bridge and device DT nodes are created at runtime. This is the same on DT base systems and this feature is available upstream too (last proposal at [3]). The DT node missing in the chain is the node for the PCI root bridge. On ACPI, no "base" dts describes this node. The PCI root bridge is described by ACPI. I have some draft code that create this DT node when a PCI host bridge is register if a DT node is not already present and so fill the hole in the DT node chain. With that the DT in an ACPI system looks like this: / pci_root_bridge { <-- Created at runtime when a PCI host bridge is registered pci_to_pci_bridge { <-- Created at runtime based on PCI enumeration pci_device { <-- Created at runtime based on PCI enumeration } } pci_device { <-- Created at runtime based on PCI enumeration }; }; With this node added, the driver works the same way in both DT and ACPI systems without any modification. I plan to send the code creating the PCI host bridge node when this current series is landed in order to add support for DT overlay over PCI on x86 systems. Also an other series (under review [4]) is needed to avoid struct device duplication related to the DT nodes creation. [1] https://lore.kernel.org/lkml/20230317053415.2254616-1-frowand.list@gmail.com/#r [2] https://lore.kernel.org/lkml/20240217010557.2381548-1-sboyd@kernel.org/ [3] https://lore.kernel.org/lkml/1692120000-46900-1-git-send-email-lizhi.hou@amd.com/ [4] https://lore.kernel.org/lkml/20240423145703.604489-1-herve.codina@bootlin.com/ Best regards, Hervé
> Also I tested on a x86 system (basically a simple PC). > Not all components are available upstream to have it working on a x86 (ACPI) > system. The missing component is not related to the LAN966x PCI driver itself > but in the way DT node are created up to the PCI device. Good to hear it nearly "just works". There does not seem to be any interest in describing complex network devices like this using ACPI, which is many years behind what we have in DT in terms of building blocks for networking devices. Like many PCIe devices, the LAN966x is pretty much self contained, so fits DT overlays nicely. There is also a slowly growing trend to have PCIe network devices which Linux controls, rather than offloading to firmware. The wangxun drivers are another example. So it is great to see the remaining pieces being put in place to support this. Thanks Andrew
Hi Sai, On Tue, 30 Apr 2024 09:21:57 +0000 Sai Krishna Gajula <saikrishnag@marvell.com> wrote: ... > > @@ -270,11 +271,18 @@ static int mscc_miim_probe(struct platform_device > > *pdev) { > > struct device_node *np = pdev->dev.of_node; > > struct regmap *mii_regmap, *phy_regmap; > > + struct reset_control *reset; > > Please follow reverse x-mass tree order > Sure, this will be fixed in the next iteration. Best regards, Hervé