diff mbox series

[v7,01/18] soc: mediatek: Disable 9-bit alpha in ETHDR

Message ID 20240502103848.5845-2-shawn.sung@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Support IGT in display driver | expand

Commit Message

Shawn Sung (宋孝謙) May 2, 2024, 10:38 a.m. UTC 
From: Hsiao Chien Sung <shawn.sung@mediatek.com>

ETHDR 9-bit alpha should be disabled by default,
otherwise alpha blending will not work.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
 drivers/soc/mediatek/mtk-mmsys.c | 1 +
 1 file changed, 1 insertion(+)

Comments

CK Hu (胡俊光) May 7, 2024, 5:58 a.m. UTC | #1 
Hi, Shawn:

On Thu, 2024-05-02 at 18:38 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.com>
> 
> ETHDR 9-bit alpha should be disabled by default,
> otherwise alpha blending will not work.

Please explain what is 9-bit alpha. Is ARGB8888 8-bit alpha? I don't
know there are 9-bit alpha. I would like to know which function would
be disabled when you disable 9-bit alpha.

Regards,
CK

> 
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
>  drivers/soc/mediatek/mtk-mmsys.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> b/drivers/soc/mediatek/mtk-mmsys.c
> index f370f4ec4b888..938240714e54c 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -236,6 +236,7 @@ void mtk_mmsys_mixer_in_config(struct device
> *dev, int idx, bool alpha_sel, u16
>  
>  	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_ALPHA + (idx
> - 1) * 4, ~0,
>  			      alpha << 16 | alpha, cmdq_pkt);
> +	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(15 +
> idx), 0, cmdq_pkt);
>  	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(19 +
> idx),
>  			      alpha_sel << (19 + idx), cmdq_pkt);
>  	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_PAD + (idx -
> 1) * 4,
Shawn Sung (宋孝謙) May 7, 2024, 10:02 a.m. UTC | #2 
Hi CK,

On Tue, 2024-05-07 at 05:58 +0000, CK Hu (胡俊光) wrote:
> Hi, Shawn:
> 
> On Thu, 2024-05-02 at 18:38 +0800, Shawn Sung wrote:
> > From: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > 
> > ETHDR 9-bit alpha should be disabled by default,
> > otherwise alpha blending will not work.
> 
> Please explain what is 9-bit alpha. Is ARGB8888 8-bit alpha? I don't
> know there are 9-bit alpha. I would like to know which function would
> be disabled when you disable 9-bit alpha.
> 

When 9-bit alpha is enabled, the original alpha range 0-255 will be
remapped to 0-256 (255 = N/A) for some special case calculation.
Checked with the designer, this setting should be always disabled and
there will be no side effects.

Thanks,
Shawn
diff mbox series

Patch

diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index f370f4ec4b888..938240714e54c 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -236,6 +236,7 @@  void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool alpha_sel, u16
 
 	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_ALPHA + (idx - 1) * 4, ~0,
 			      alpha << 16 | alpha, cmdq_pkt);
+	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(15 + idx), 0, cmdq_pkt);
 	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(19 + idx),
 			      alpha_sel << (19 + idx), cmdq_pkt);
 	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1) * 4,