diff mbox series

tests/qtest/boot-serial-test: Add support on LoongArch system

Message ID 20240508085514.2510592-1-maobibo@loongson.cn (mailing list archive)
State New, archived
Headers show
Series tests/qtest/boot-serial-test: Add support on LoongArch system | expand

Commit Message

Bibo Mao May 8, 2024, 8:55 a.m. UTC 
Add boot-serial-test test case support on LoongArch system.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
 tests/qtest/boot-serial-test.c | 10 ++++++++++
 tests/qtest/meson.build        |  4 ++++
 2 files changed, 14 insertions(+)


base-commit: 4e66a08546a2588a4667766a1edab9caccf24ce3

Comments

Thomas Huth May 8, 2024, 9 a.m. UTC | #1 
On 08/05/2024 10.55, Bibo Mao wrote:
> Add boot-serial-test test case support on LoongArch system.

... and also the filter tests?

> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
> ---
>   tests/qtest/boot-serial-test.c | 10 ++++++++++
>   tests/qtest/meson.build        |  4 ++++
>   2 files changed, 14 insertions(+)
> 
> diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c
> index e3b7d65fe5..631015e8c8 100644
> --- a/tests/qtest/boot-serial-test.c
> +++ b/tests/qtest/boot-serial-test.c
> @@ -129,6 +129,14 @@ static const uint8_t kernel_stm32vldiscovery[] = {
>       0x04, 0x38, 0x01, 0x40                  /* 0x40013804 = USART1 TXD */
>   };
>   
> +static const uint8_t bios_loongarch64[] = {
> +    0x0c, 0xc0, 0x3f, 0x14,                 /* lu12i.w $t0, 0x1fe00    */
> +    0x8c, 0x81, 0x87, 0x03,                 /* ori     $t0, $t0, 0x1e0 */
> +    0x0d, 0x50, 0x81, 0x03,                 /* li.w    $t1, 'T'        */
> +    0x8d, 0x01, 0x00, 0x29,                 /* st.b    $t1, $t0, 0     */
> +    0xff, 0xf3, 0xff, 0x53,                 /*  b      -16  # loop     */
> +};
> +
>   typedef struct testdef {
>       const char *arch;       /* Target architecture */
>       const char *machine;    /* Name of the machine */
> @@ -181,6 +189,8 @@ static const testdef_t tests[] = {
>       { "arm", "microbit", "", "T", sizeof(kernel_nrf51), kernel_nrf51 },
>       { "arm", "stm32vldiscovery", "", "T",
>         sizeof(kernel_stm32vldiscovery), kernel_stm32vldiscovery },
> +    { "loongarch64", "virt", "-cpu max", "TT", sizeof(bios_loongarch64),
> +      NULL, bios_loongarch64 },
>   
>       { NULL }
>   };
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index 6f2f594ace..6619b630e6 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -256,6 +256,10 @@ qtests_s390x = \
>   qtests_riscv32 = \
>     (config_all_devices.has_key('CONFIG_SIFIVE_E_AON') ? ['sifive-e-aon-watchdog-test'] : [])
>   
> + qtests_loongarch64 = \
> +  qtests_filter + \
> +  ['boot-serial-test']

It's already a little bit messed up, but I think we originally had the 
entries in alphabetical order, so I'd like to suggest to add this between 
qtests_hppa and qtests_m68k instead.

  Thomas


>   qos_test_ss = ss.source_set()
>   qos_test_ss.add(
>     'ac97-test.c',
> 
> base-commit: 4e66a08546a2588a4667766a1edab9caccf24ce3
Bibo Mao May 8, 2024, 9:17 a.m. UTC | #2 
On 2024/5/8 下午5:00, Thomas Huth wrote:
> On 08/05/2024 10.55, Bibo Mao wrote:
>> Add boot-serial-test test case support on LoongArch system.
> 
> ... and also the filter tests?
yes, it is :) Will update changelog in next version.

> 
>> Signed-off-by: Bibo Mao <maobibo@loongson.cn>
>> ---
>>   tests/qtest/boot-serial-test.c | 10 ++++++++++
>>   tests/qtest/meson.build        |  4 ++++
>>   2 files changed, 14 insertions(+)
>>
>> diff --git a/tests/qtest/boot-serial-test.c 
>> b/tests/qtest/boot-serial-test.c
>> index e3b7d65fe5..631015e8c8 100644
>> --- a/tests/qtest/boot-serial-test.c
>> +++ b/tests/qtest/boot-serial-test.c
>> @@ -129,6 +129,14 @@ static const uint8_t kernel_stm32vldiscovery[] = {
>>       0x04, 0x38, 0x01, 0x40                  /* 0x40013804 = USART1 
>> TXD */
>>   };
>> +static const uint8_t bios_loongarch64[] = {
>> +    0x0c, 0xc0, 0x3f, 0x14,            /* lu12i.w $t0,  0x1fe00    */
>> +    0x8c, 0x81, 0x87, 0x03,            /* ori     $t0,  $t0, 0x1e0 */
>> +    0x0d, 0x50, 0x81, 0x03,            /* li.w    $t1,  'T'        */
>> +    0x8d, 0x01, 0x00, 0x29,            /* st.b    $t1, $t0,  0     */
>> +    0xff, 0xf3, 0xff, 0x53,            /*  b      -16  #loop       */
>> +};
>> +
>>   typedef struct testdef {
>>       const char *arch;       /* Target architecture */
>>       const char *machine;    /* Name of the machine */
>> @@ -181,6 +189,8 @@ static const testdef_t tests[] = {
>>       { "arm", "microbit", "", "T", sizeof(kernel_nrf51), kernel_nrf51 },
>>       { "arm", "stm32vldiscovery", "", "T",
>>         sizeof(kernel_stm32vldiscovery), kernel_stm32vldiscovery },
>> +    { "loongarch64", "virt", "-cpu max", "TT", sizeof(bios_loongarch64),
>> +      NULL, bios_loongarch64 },
>>       { NULL }
>>   };
>> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
>> index 6f2f594ace..6619b630e6 100644
>> --- a/tests/qtest/meson.build
>> +++ b/tests/qtest/meson.build
>> @@ -256,6 +256,10 @@ qtests_s390x = \
>>   qtests_riscv32 = \
>>     (config_all_devices.has_key('CONFIG_SIFIVE_E_AON') ? 
>> ['sifive-e-aon-watchdog-test'] : [])
>> + qtests_loongarch64 = \
>> +  qtests_filter + \
>> +  ['boot-serial-test']
> 
> It's already a little bit messed up, but I think we originally had the 
> entries in alphabetical order, so I'd like to suggest to add this 
> between qtests_hppa and qtests_m68k instead.
sure, will do.

Regards
Bibo Mao
> 
>   Thomas
> 
> 
>>   qos_test_ss = ss.source_set()
>>   qos_test_ss.add(
>>     'ac97-test.c',
>>
>> base-commit: 4e66a08546a2588a4667766a1edab9caccf24ce3
>
diff mbox series

Patch

diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c
index e3b7d65fe5..631015e8c8 100644
--- a/tests/qtest/boot-serial-test.c
+++ b/tests/qtest/boot-serial-test.c
@@ -129,6 +129,14 @@  static const uint8_t kernel_stm32vldiscovery[] = {
     0x04, 0x38, 0x01, 0x40                  /* 0x40013804 = USART1 TXD */
 };
 
+static const uint8_t bios_loongarch64[] = {
+    0x0c, 0xc0, 0x3f, 0x14,                 /* lu12i.w $t0, 0x1fe00    */
+    0x8c, 0x81, 0x87, 0x03,                 /* ori     $t0, $t0, 0x1e0 */
+    0x0d, 0x50, 0x81, 0x03,                 /* li.w    $t1, 'T'        */
+    0x8d, 0x01, 0x00, 0x29,                 /* st.b    $t1, $t0, 0     */
+    0xff, 0xf3, 0xff, 0x53,                 /*  b      -16  # loop     */
+};
+
 typedef struct testdef {
     const char *arch;       /* Target architecture */
     const char *machine;    /* Name of the machine */
@@ -181,6 +189,8 @@  static const testdef_t tests[] = {
     { "arm", "microbit", "", "T", sizeof(kernel_nrf51), kernel_nrf51 },
     { "arm", "stm32vldiscovery", "", "T",
       sizeof(kernel_stm32vldiscovery), kernel_stm32vldiscovery },
+    { "loongarch64", "virt", "-cpu max", "TT", sizeof(bios_loongarch64),
+      NULL, bios_loongarch64 },
 
     { NULL }
 };
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index 6f2f594ace..6619b630e6 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -256,6 +256,10 @@  qtests_s390x = \
 qtests_riscv32 = \
   (config_all_devices.has_key('CONFIG_SIFIVE_E_AON') ? ['sifive-e-aon-watchdog-test'] : [])
 
+ qtests_loongarch64 = \
+  qtests_filter + \
+  ['boot-serial-test']
+
 qos_test_ss = ss.source_set()
 qos_test_ss.add(
   'ac97-test.c',