diff mbox series

[4/5] drm/i915: simplify ULT/ULX subplatform detection

Message ID 0d96bdbcb87672ef1b78b5f78431aab4d2984818.1715086509.git.jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: PCI ID macro and subplatform changes | expand

Commit Message

Jani Nikula May 7, 2024, 12:56 p.m. UTC 
For HSW/BDW ULX machines are also considered ULT. For the sake of
simplicity and clarity, handle this at the IS_XXX_ULT() macro level
instead of two simultaneous subplatforms.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 9 ++++++---
 drivers/gpu/drm/i915/intel_device_info.c | 4 ----
 2 files changed, 6 insertions(+), 7 deletions(-)

Comments

Rodrigo Vivi May 8, 2024, 12:51 p.m. UTC | #1 
On Tue, May 07, 2024 at 03:56:51PM +0300, Jani Nikula wrote:
> For HSW/BDW ULX machines are also considered ULT. For the sake of
> simplicity and clarity, handle this at the IS_XXX_ULT() macro level
> instead of two simultaneous subplatforms.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 9 ++++++---
>  drivers/gpu/drm/i915/intel_device_info.c | 4 ----
>  2 files changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d1d21d433766..9c57af484ba8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -562,19 +562,22 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
>  #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
>  				    (INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
> +/* BDW ULX machines are also considered ULT. */
>  #define IS_BROADWELL_ULT(i915) \
> -	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
> +	(IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT) || \
> +	 IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX))
>  #define IS_BROADWELL_ULX(i915) \
>  	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
>  #define IS_BROADWELL_GT3(i915)	(IS_BROADWELL(i915) && \
>  				 INTEL_INFO(i915)->gt == 3)
> +/* HSW ULX machines are also considered ULT. */
>  #define IS_HASWELL_ULT(i915) \
> -	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
> +	(IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT) ||	\
> +	 IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX))
>  #define IS_HASWELL_GT3(i915)	(IS_HASWELL(i915) && \
>  				 INTEL_INFO(i915)->gt == 3)
>  #define IS_HASWELL_GT1(i915)	(IS_HASWELL(i915) && \
>  				 INTEL_INFO(i915)->gt == 1)
> -/* ULX machines are also considered ULT. */
>  #define IS_HASWELL_ULX(i915) \
>  	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
>  #define IS_SKYLAKE_ULT(i915) \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 27b4a5882be3..a72efa919602 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -232,10 +232,6 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
>  	} else if (find_devid(devid, subplatform_ulx_ids,
>  			      ARRAY_SIZE(subplatform_ulx_ids))) {
>  		mask = BIT(INTEL_SUBPLATFORM_ULX);
> -		if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
> -			/* ULX machines are also considered ULT. */
> -			mask |= BIT(INTEL_SUBPLATFORM_ULT);
> -		}

Oh... it is a long time since I don't look to these bits,
but I don't believe that the define above would cover this case here.

It seems that you will miss the bits in this platform_mask.

>  	} else if (find_devid(devid, subplatform_portf_ids,
>  			      ARRAY_SIZE(subplatform_portf_ids))) {
>  		mask = BIT(INTEL_SUBPLATFORM_PORTF);
> -- 
> 2.39.2
>
Jani Nikula May 8, 2024, 1:01 p.m. UTC | #2 
On Wed, 08 May 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Tue, May 07, 2024 at 03:56:51PM +0300, Jani Nikula wrote:
>> For HSW/BDW ULX machines are also considered ULT. For the sake of
>> simplicity and clarity, handle this at the IS_XXX_ULT() macro level
>> instead of two simultaneous subplatforms.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h          | 9 ++++++---
>>  drivers/gpu/drm/i915/intel_device_info.c | 4 ----
>>  2 files changed, 6 insertions(+), 7 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index d1d21d433766..9c57af484ba8 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -562,19 +562,22 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>>  	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
>>  #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
>>  				    (INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
>> +/* BDW ULX machines are also considered ULT. */
>>  #define IS_BROADWELL_ULT(i915) \
>> -	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
>> +	(IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT) || \
>> +	 IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX))
>>  #define IS_BROADWELL_ULX(i915) \
>>  	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
>>  #define IS_BROADWELL_GT3(i915)	(IS_BROADWELL(i915) && \
>>  				 INTEL_INFO(i915)->gt == 3)
>> +/* HSW ULX machines are also considered ULT. */
>>  #define IS_HASWELL_ULT(i915) \
>> -	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
>> +	(IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT) ||	\
>> +	 IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX))
>>  #define IS_HASWELL_GT3(i915)	(IS_HASWELL(i915) && \
>>  				 INTEL_INFO(i915)->gt == 3)
>>  #define IS_HASWELL_GT1(i915)	(IS_HASWELL(i915) && \
>>  				 INTEL_INFO(i915)->gt == 1)
>> -/* ULX machines are also considered ULT. */
>>  #define IS_HASWELL_ULX(i915) \
>>  	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
>>  #define IS_SKYLAKE_ULT(i915) \
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>> index 27b4a5882be3..a72efa919602 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>> @@ -232,10 +232,6 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
>>  	} else if (find_devid(devid, subplatform_ulx_ids,
>>  			      ARRAY_SIZE(subplatform_ulx_ids))) {
>>  		mask = BIT(INTEL_SUBPLATFORM_ULX);
>> -		if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
>> -			/* ULX machines are also considered ULT. */
>> -			mask |= BIT(INTEL_SUBPLATFORM_ULT);
>> -		}
>
> Oh... it is a long time since I don't look to these bits,
> but I don't believe that the define above would cover this case here.
>
> It seems that you will miss the bits in this platform_mask.

How come?

What this does is make ULX platforms also match the ULT checks. Thus I'm
changing the ULT macros to include ULX subplatforms.

Or I don't understand what you mean.

BR,
Jani.




>
>>  	} else if (find_devid(devid, subplatform_portf_ids,
>>  			      ARRAY_SIZE(subplatform_portf_ids))) {
>>  		mask = BIT(INTEL_SUBPLATFORM_PORTF);
>> -- 
>> 2.39.2
>>
Rodrigo Vivi May 8, 2024, 1:52 p.m. UTC | #3 
On Wed, May 08, 2024 at 04:01:56PM +0300, Jani Nikula wrote:
> On Wed, 08 May 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> > On Tue, May 07, 2024 at 03:56:51PM +0300, Jani Nikula wrote:
> >> For HSW/BDW ULX machines are also considered ULT. For the sake of
> >> simplicity and clarity, handle this at the IS_XXX_ULT() macro level
> >> instead of two simultaneous subplatforms.
> >> 
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/i915_drv.h          | 9 ++++++---
> >>  drivers/gpu/drm/i915/intel_device_info.c | 4 ----
> >>  2 files changed, 6 insertions(+), 7 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >> index d1d21d433766..9c57af484ba8 100644
> >> --- a/drivers/gpu/drm/i915/i915_drv.h
> >> +++ b/drivers/gpu/drm/i915/i915_drv.h
> >> @@ -562,19 +562,22 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> >>  	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
> >>  #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
> >>  				    (INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
> >> +/* BDW ULX machines are also considered ULT. */
> >>  #define IS_BROADWELL_ULT(i915) \
> >> -	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
> >> +	(IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT) || \
> >> +	 IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX))
> >>  #define IS_BROADWELL_ULX(i915) \
> >>  	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
> >>  #define IS_BROADWELL_GT3(i915)	(IS_BROADWELL(i915) && \
> >>  				 INTEL_INFO(i915)->gt == 3)
> >> +/* HSW ULX machines are also considered ULT. */
> >>  #define IS_HASWELL_ULT(i915) \
> >> -	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
> >> +	(IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT) ||	\
> >> +	 IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX))
> >>  #define IS_HASWELL_GT3(i915)	(IS_HASWELL(i915) && \
> >>  				 INTEL_INFO(i915)->gt == 3)
> >>  #define IS_HASWELL_GT1(i915)	(IS_HASWELL(i915) && \
> >>  				 INTEL_INFO(i915)->gt == 1)
> >> -/* ULX machines are also considered ULT. */
> >>  #define IS_HASWELL_ULX(i915) \
> >>  	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
> >>  #define IS_SKYLAKE_ULT(i915) \
> >> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> >> index 27b4a5882be3..a72efa919602 100644
> >> --- a/drivers/gpu/drm/i915/intel_device_info.c
> >> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> >> @@ -232,10 +232,6 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
> >>  	} else if (find_devid(devid, subplatform_ulx_ids,
> >>  			      ARRAY_SIZE(subplatform_ulx_ids))) {
> >>  		mask = BIT(INTEL_SUBPLATFORM_ULX);
> >> -		if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
> >> -			/* ULX machines are also considered ULT. */
> >> -			mask |= BIT(INTEL_SUBPLATFORM_ULT);
> >> -		}
> >
> > Oh... it is a long time since I don't look to these bits,
> > but I don't believe that the define above would cover this case here.
> >
> > It seems that you will miss the bits in this platform_mask.
> 
> How come?
> 
> What this does is make ULX platforms also match the ULT checks. Thus I'm
> changing the ULT macros to include ULX subplatforms.
> 
> Or I don't understand what you mean.

I'm sorry, I had missed that mostly that platform_mask is used
at the decision of the defines above.

However, this change would have some side effect:

	err_printf(m, "Subplatform: 0x%x\n",
                   intel_subplatform(&error->runtime_info,
                                     error->device_info.platform));

The signature for GPU hangs error states would change on these
platforms. That could cause some confusion on people debugging
some issues. Although that's so old that I honestly doubt that
it would have some meangninful impact.

up to you:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> BR,
> Jani.
> 
> 
> 
> 
> >
> >>  	} else if (find_devid(devid, subplatform_portf_ids,
> >>  			      ARRAY_SIZE(subplatform_portf_ids))) {
> >>  		mask = BIT(INTEL_SUBPLATFORM_PORTF);
> >> -- 
> >> 2.39.2
> >> 
> 
> -- 
> Jani Nikula, Intel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d1d21d433766..9c57af484ba8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -562,19 +562,22 @@  IS_SUBPLATFORM(const struct drm_i915_private *i915,
 	IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
 #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
 				    (INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
+/* BDW ULX machines are also considered ULT. */
 #define IS_BROADWELL_ULT(i915) \
-	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
+	(IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT) || \
+	 IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX))
 #define IS_BROADWELL_ULX(i915) \
 	IS_SUBPLATFORM(i915, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
 #define IS_BROADWELL_GT3(i915)	(IS_BROADWELL(i915) && \
 				 INTEL_INFO(i915)->gt == 3)
+/* HSW ULX machines are also considered ULT. */
 #define IS_HASWELL_ULT(i915) \
-	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
+	(IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT) ||	\
+	 IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX))
 #define IS_HASWELL_GT3(i915)	(IS_HASWELL(i915) && \
 				 INTEL_INFO(i915)->gt == 3)
 #define IS_HASWELL_GT1(i915)	(IS_HASWELL(i915) && \
 				 INTEL_INFO(i915)->gt == 1)
-/* ULX machines are also considered ULT. */
 #define IS_HASWELL_ULX(i915) \
 	IS_SUBPLATFORM(i915, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
 #define IS_SKYLAKE_ULT(i915) \
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 27b4a5882be3..a72efa919602 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -232,10 +232,6 @@  static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
 	} else if (find_devid(devid, subplatform_ulx_ids,
 			      ARRAY_SIZE(subplatform_ulx_ids))) {
 		mask = BIT(INTEL_SUBPLATFORM_ULX);
-		if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
-			/* ULX machines are also considered ULT. */
-			mask |= BIT(INTEL_SUBPLATFORM_ULT);
-		}
 	} else if (find_devid(devid, subplatform_portf_ids,
 			      ARRAY_SIZE(subplatform_portf_ids))) {
 		mask = BIT(INTEL_SUBPLATFORM_PORTF);