diff mbox series

clk: qcom: apss-ipq-pll: remove 'config_ctl_hi_val' from Stromer pll configs

Message ID 20240509-stromer-config-ctl-v1-1-6034e17b28d5@gmail.com (mailing list archive)
State Awaiting Upstream, archived
Headers show
Series clk: qcom: apss-ipq-pll: remove 'config_ctl_hi_val' from Stromer pll configs | expand

Commit Message

Gabor Juhos May 9, 2024, 8:08 a.m. UTC
Since the CONFIG_CTL register is only 32 bits wide in the Stromer
and Stromer Plus PLLs , the 'config_ctl_hi_val' values from the
IPQ5018 and IPQ5332 configurations are not used so remove those.

No functional changes.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
---
Based on 'qcom-clk-for-6.10'
---
 drivers/clk/qcom/apss-ipq-pll.c | 2 --
 1 file changed, 2 deletions(-)


---
base-commit: 3c5b3e17b8fd1f1add5a9477306c355fab126977
change-id: 20240509-stromer-config-ctl-8cee8e857e13

Best regards,

Comments

Konrad Dybcio May 9, 2024, 6:53 p.m. UTC | #1
On 9.05.2024 10:08 AM, Gabor Juhos wrote:
> Since the CONFIG_CTL register is only 32 bits wide in the Stromer
> and Stromer Plus PLLs , the 'config_ctl_hi_val' values from the
> IPQ5018 and IPQ5332 configurations are not used so remove those.
> 
> No functional changes.
> 
> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
> ---

Hm, it sounds suspicious that we'd have these settings then.. Could somebody from
QC please confirm that everything's alright here?

Konrad
Kathiravan Thirumoorthy May 10, 2024, 4:25 p.m. UTC | #2
On 5/10/2024 12:23 AM, Konrad Dybcio wrote:
> On 9.05.2024 10:08 AM, Gabor Juhos wrote:
>> Since the CONFIG_CTL register is only 32 bits wide in the Stromer
>> and Stromer Plus PLLs , the 'config_ctl_hi_val' values from the
>> IPQ5018 and IPQ5332 configurations are not used so remove those.
>>
>> No functional changes.
>>
>> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
>> ---
> 
> Hm, it sounds suspicious that we'd have these settings then.. Could somebody from
> QC please confirm that everything's alright here?


I checked the HW doc and yes in both IPQ5018 and IPQ5332 CONFIG_CTL_U 
register is not implemented. I see offset of CONFIG_CTL_U register is 
removed in the change[1] by Gabor.

Given that, should we also drop the pll_has_64bit_config() if block from 
clk_stromer_pll_configure function?

Nevertheless, for this patch

Reviewed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>


[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=4f2bc4acbb19

> 
> Konrad
Konrad Dybcio May 10, 2024, 5:25 p.m. UTC | #3
On 10.05.2024 6:25 PM, Kathiravan Thirumoorthy wrote:
> 
> 
> On 5/10/2024 12:23 AM, Konrad Dybcio wrote:
>> On 9.05.2024 10:08 AM, Gabor Juhos wrote:
>>> Since the CONFIG_CTL register is only 32 bits wide in the Stromer
>>> and Stromer Plus PLLs , the 'config_ctl_hi_val' values from the
>>> IPQ5018 and IPQ5332 configurations are not used so remove those.
>>>
>>> No functional changes.
>>>
>>> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
>>> ---
>>
>> Hm, it sounds suspicious that we'd have these settings then.. Could somebody from
>> QC please confirm that everything's alright here?
> 
> 
> I checked the HW doc and yes in both IPQ5018 and IPQ5332 CONFIG_CTL_U register is not implemented. I see offset of CONFIG_CTL_U register is removed in the change[1] by Gabor.

Thanks

Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Gabor Juhos May 13, 2024, 6:44 p.m. UTC | #4
2024. 05. 10. 18:25 keltezéssel, Kathiravan Thirumoorthy írta:
> 
> 
> On 5/10/2024 12:23 AM, Konrad Dybcio wrote:
>> On 9.05.2024 10:08 AM, Gabor Juhos wrote:
>>> Since the CONFIG_CTL register is only 32 bits wide in the Stromer
>>> and Stromer Plus PLLs , the 'config_ctl_hi_val' values from the
>>> IPQ5018 and IPQ5332 configurations are not used so remove those.
>>>
>>> No functional changes.
>>>
>>> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
>>> ---
>>
>> Hm, it sounds suspicious that we'd have these settings then.. Could somebody from
>> QC please confirm that everything's alright here?
> 
> 
> I checked the HW doc and yes in both IPQ5018 and IPQ5332 CONFIG_CTL_U register
> is not implemented. I see offset of CONFIG_CTL_U register is removed in the
> change[1] by Gabor.

Thanks for confirming!

> 
> Given that, should we also drop the pll_has_64bit_config() if block from
> clk_stromer_pll_configure function?

If we can be sure, that there will be no Stromer PLLs which implements that
register we can drop the check. Also, since the SUPPORTS_FSM_MODE flag is not
set for any of the Stromer (Plus) Plls supported currently, the related check
can be dropped as well.

However I would keep that as is for now. I'm planning to remove the
clk_stromer_pll_configure() function entirely but that needs a bunch of
preparatory patches which I'm working on at the moment.

> 
> Nevertheless, for this patch
> 
> Reviewed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>

Thank you!

Regards,
Gabor
Kathiravan Thirumoorthy May 14, 2024, 4:08 p.m. UTC | #5
On 5/14/2024 12:14 AM, Gabor Juhos wrote:
> 2024. 05. 10. 18:25 keltezéssel, Kathiravan Thirumoorthy írta:
>>
>>
>> On 5/10/2024 12:23 AM, Konrad Dybcio wrote:
>>> On 9.05.2024 10:08 AM, Gabor Juhos wrote:
>>>> Since the CONFIG_CTL register is only 32 bits wide in the Stromer
>>>> and Stromer Plus PLLs , the 'config_ctl_hi_val' values from the
>>>> IPQ5018 and IPQ5332 configurations are not used so remove those.
>>>>
>>>> No functional changes.
>>>>
>>>> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
>>>> ---
>>>
>>> Hm, it sounds suspicious that we'd have these settings then.. Could somebody from
>>> QC please confirm that everything's alright here?
>>
>>
>> I checked the HW doc and yes in both IPQ5018 and IPQ5332 CONFIG_CTL_U register
>> is not implemented. I see offset of CONFIG_CTL_U register is removed in the
>> change[1] by Gabor.
> 
> Thanks for confirming!
> 
>>
>> Given that, should we also drop the pll_has_64bit_config() if block from
>> clk_stromer_pll_configure function?
> 
> If we can be sure, that there will be no Stromer PLLs which implements that
> register we can drop the check. Also, since the SUPPORTS_FSM_MODE flag is not
> set for any of the Stromer (Plus) Plls supported currently, the related check
> can be dropped as well.
> 
> However I would keep that as is for now. I'm planning to remove the
> clk_stromer_pll_configure() function entirely but that needs a bunch of
> preparatory patches which I'm working on at the moment.
> 


It was Stephen's suggestion[1] to introduce the 
clk_stromer_pll_configure() to avoid touching the 
clk_alpha_pll_configure() which has been used by many PLLs. However if 
we have a valid points to remove this API, then yes.

[1] 
https://lore.kernel.org/linux-arm-msm/fd150fa2b35e1e07808e3d1e67e1def7.sboyd@kernel.org/


>>
>> Nevertheless, for this patch
>>
>> Reviewed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
> 
> Thank you!
> 
> Regards,
> Gabor
Bjorn Andersson May 29, 2024, 2:01 a.m. UTC | #6
On Thu, 09 May 2024 10:08:04 +0200, Gabor Juhos wrote:
> Since the CONFIG_CTL register is only 32 bits wide in the Stromer
> and Stromer Plus PLLs , the 'config_ctl_hi_val' values from the
> IPQ5018 and IPQ5332 configurations are not used so remove those.
> 
> No functional changes.
> 
> 
> [...]

Applied, thanks!

[1/1] clk: qcom: apss-ipq-pll: remove 'config_ctl_hi_val' from Stromer pll configs
      commit: 2ba8425678af422da37b6c9b50e9ce66f0f55cae

Best regards,
diff mbox series

Patch

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index 5f7f537e4ecb..e8632db2c542 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -70,7 +70,6 @@  static struct clk_alpha_pll ipq_pll_stromer_plus = {
 static const struct alpha_pll_config ipq5018_pll_config = {
 	.l = 0x2a,
 	.config_ctl_val = 0x4001075b,
-	.config_ctl_hi_val = 0x304,
 	.main_output_mask = BIT(0),
 	.aux_output_mask = BIT(1),
 	.early_output_mask = BIT(3),
@@ -84,7 +83,6 @@  static const struct alpha_pll_config ipq5018_pll_config = {
 static const struct alpha_pll_config ipq5332_pll_config = {
 	.l = 0x2d,
 	.config_ctl_val = 0x4001075b,
-	.config_ctl_hi_val = 0x304,
 	.main_output_mask = BIT(0),
 	.aux_output_mask = BIT(1),
 	.early_output_mask = BIT(3),