| Message ID | 20240517233801.4071868-4-quic_abhinavk@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [RFC,1/4] drm/msm: register a fault handler for display mmu faults | expand |
On Fri, May 17, 2024 at 04:37:58PM -0700, Abhinav Kumar wrote: > Introduce a new API msm_iommu_disp_new() for display use-cases. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/msm_iommu.c | 28 ++++++++++++++++++++++++++++ > drivers/gpu/drm/msm/msm_mmu.h | 1 + > 2 files changed, 29 insertions(+) > > diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c > index a79cd18bc4c9..3d5c1bb4c013 100644 > --- a/drivers/gpu/drm/msm/msm_iommu.c > +++ b/drivers/gpu/drm/msm/msm_iommu.c > @@ -343,6 +343,19 @@ static int msm_gpu_fault_handler(struct iommu_domain *domain, struct device *dev > return 0; > } > > +static int msm_disp_fault_handler(struct iommu_domain *domain, struct device *dev, > + unsigned long iova, int flags, void *arg) > +{ > + struct msm_iommu *iommu = arg; > + > + if (iommu->base.handler) > + return iommu->base.handler(iommu->base.arg, iova, flags, NULL); > + > + pr_warn_ratelimited("*** fault: iova=%16lx, flags=%d\n", iova, flags); > + > + return 0; I'd say, drop pr_warn and return -ENOSYS, letting the arm_smmu_context_fault() report the error. > +} > + > static void msm_iommu_resume_translation(struct msm_mmu *mmu) > { > struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(mmu->dev); > @@ -434,6 +447,21 @@ struct msm_mmu *msm_iommu_new(struct device *dev, unsigned long quirks) > return &iommu->base; > } > > +struct msm_mmu *msm_iommu_disp_new(struct device *dev, unsigned long quirks) > +{ > + struct msm_iommu *iommu; > + struct msm_mmu *mmu; > + > + mmu = msm_iommu_new(dev, quirks); > + if (IS_ERR_OR_NULL(mmu)) > + return mmu; > + > + iommu = to_msm_iommu(mmu); > + iommu_set_fault_handler(iommu->domain, msm_disp_fault_handler, iommu); > + > + return mmu; > +} > + > struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks) > { > struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev); > diff --git a/drivers/gpu/drm/msm/msm_mmu.h b/drivers/gpu/drm/msm/msm_mmu.h > index 88af4f490881..730458d08d6b 100644 > --- a/drivers/gpu/drm/msm/msm_mmu.h > +++ b/drivers/gpu/drm/msm/msm_mmu.h > @@ -42,6 +42,7 @@ static inline void msm_mmu_init(struct msm_mmu *mmu, struct device *dev, > > struct msm_mmu *msm_iommu_new(struct device *dev, unsigned long quirks); > struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks); > +struct msm_mmu *msm_iommu_disp_new(struct device *dev, unsigned long quirks); > > static inline void msm_mmu_set_fault_handler(struct msm_mmu *mmu, void *arg, > int (*handler)(void *arg, unsigned long iova, int flags, void *data)) > -- > 2.44.0 >
diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c index a79cd18bc4c9..3d5c1bb4c013 100644 --- a/drivers/gpu/drm/msm/msm_iommu.c +++ b/drivers/gpu/drm/msm/msm_iommu.c @@ -343,6 +343,19 @@ static int msm_gpu_fault_handler(struct iommu_domain *domain, struct device *dev return 0; } +static int msm_disp_fault_handler(struct iommu_domain *domain, struct device *dev, + unsigned long iova, int flags, void *arg) +{ + struct msm_iommu *iommu = arg; + + if (iommu->base.handler) + return iommu->base.handler(iommu->base.arg, iova, flags, NULL); + + pr_warn_ratelimited("*** fault: iova=%16lx, flags=%d\n", iova, flags); + + return 0; +} + static void msm_iommu_resume_translation(struct msm_mmu *mmu) { struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(mmu->dev); @@ -434,6 +447,21 @@ struct msm_mmu *msm_iommu_new(struct device *dev, unsigned long quirks) return &iommu->base; } +struct msm_mmu *msm_iommu_disp_new(struct device *dev, unsigned long quirks) +{ + struct msm_iommu *iommu; + struct msm_mmu *mmu; + + mmu = msm_iommu_new(dev, quirks); + if (IS_ERR_OR_NULL(mmu)) + return mmu; + + iommu = to_msm_iommu(mmu); + iommu_set_fault_handler(iommu->domain, msm_disp_fault_handler, iommu); + + return mmu; +} + struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks) { struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev); diff --git a/drivers/gpu/drm/msm/msm_mmu.h b/drivers/gpu/drm/msm/msm_mmu.h index 88af4f490881..730458d08d6b 100644 --- a/drivers/gpu/drm/msm/msm_mmu.h +++ b/drivers/gpu/drm/msm/msm_mmu.h @@ -42,6 +42,7 @@ static inline void msm_mmu_init(struct msm_mmu *mmu, struct device *dev, struct msm_mmu *msm_iommu_new(struct device *dev, unsigned long quirks); struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks); +struct msm_mmu *msm_iommu_disp_new(struct device *dev, unsigned long quirks); static inline void msm_mmu_set_fault_handler(struct msm_mmu *mmu, void *arg, int (*handler)(void *arg, unsigned long iova, int flags, void *data))
Introduce a new API msm_iommu_disp_new() for display use-cases. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/msm_iommu.c | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/msm/msm_mmu.h | 1 + 2 files changed, 29 insertions(+)