| Message ID | 20240501152451.4458-1-manali.shukla@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: selftest: Add family and model check for zen4 in PMU filter test | expand |
On Wed, May 01, 2024, Manali Shukla wrote: > PMU event filter test fails on zen4 architecture because of > unavailability of family and model check for zen4 in use_amd_pmu(). > So, add family and model check for zen4 architecture in use_amd_pmu(). Is there a less ugly way to detect that 0xc2,0 == "branch instructions retired"? E.g. can we instead check for v2 PMU support, or are there no guarantees going forward? Pivoting on FMS is so painful :-(
On 5/1/2024 9:02 PM, Sean Christopherson wrote: > On Wed, May 01, 2024, Manali Shukla wrote: >> PMU event filter test fails on zen4 architecture because of >> unavailability of family and model check for zen4 in use_amd_pmu(). >> So, add family and model check for zen4 architecture in use_amd_pmu(). > > Is there a less ugly way to detect that 0xc2,0 == "branch instructions retired"? > E.g. can we instead check for v2 PMU support, or are there no guarantees going > forward? Pivoting on FMS is so painful :-( We have confirmed with the hardware team that 0xc2,0 == "branch instructions retired" is always true going forward, we intend to maintain backward compatibility for branch instruction retired. Since event 0xc2 is supported on all currently released F17h+ processors as branch instructions retired, we can check for "family >= 0x17" for all Zen and its successors instead of checking them individually in pmu_event_filter_test.c. - Manali
On Tue, May 28, 2024, Manali Shukla wrote: > On 5/1/2024 9:02 PM, Sean Christopherson wrote: > > On Wed, May 01, 2024, Manali Shukla wrote: > >> PMU event filter test fails on zen4 architecture because of > >> unavailability of family and model check for zen4 in use_amd_pmu(). > >> So, add family and model check for zen4 architecture in use_amd_pmu(). > > > > Is there a less ugly way to detect that 0xc2,0 == "branch instructions retired"? > > E.g. can we instead check for v2 PMU support, or are there no guarantees going > > forward? Pivoting on FMS is so painful :-( > > We have confirmed with the hardware team that 0xc2,0 == "branch instructions retired" > is always true going forward, we intend to maintain backward compatibility for branch > instruction retired. Since event 0xc2 is supported on all currently released F17h+ > processors as branch instructions retired, we can check for "family >= 0x17" for all > Zen and its successors instead of checking them individually in pmu_event_filter_test.c. Can you send a patch for this? Please :-)
On 6/4/2024 3:47 AM, Sean Christopherson wrote: > On Tue, May 28, 2024, Manali Shukla wrote: >> On 5/1/2024 9:02 PM, Sean Christopherson wrote: >>> On Wed, May 01, 2024, Manali Shukla wrote: >>>> PMU event filter test fails on zen4 architecture because of >>>> unavailability of family and model check for zen4 in use_amd_pmu(). >>>> So, add family and model check for zen4 architecture in use_amd_pmu(). >>> >>> Is there a less ugly way to detect that 0xc2,0 == "branch instructions retired"? >>> E.g. can we instead check for v2 PMU support, or are there no guarantees going >>> forward? Pivoting on FMS is so painful :-( >> >> We have confirmed with the hardware team that 0xc2,0 == "branch instructions retired" >> is always true going forward, we intend to maintain backward compatibility for branch >> instruction retired. Since event 0xc2 is supported on all currently released F17h+ >> processors as branch instructions retired, we can check for "family >= 0x17" for all >> Zen and its successors instead of checking them individually in pmu_event_filter_test.c. > > Can you send a patch for this? Please :-) Sent. https://lore.kernel.org/kvm/20240605050835.30491-1-manali.shukla@amd.com/T/#u -Manali
diff --git a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c index 3c85d1ae9893..c212ca4ffa72 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c @@ -374,6 +374,12 @@ static bool is_zen3(uint32_t family, uint32_t model) return family == 0x19 && model <= 0x0f; } +static bool is_zen4(uint32_t family, uint32_t model) +{ + return family == 0x19 && ((model >= 0x10 && model <= 0x1f) || + (model >= 0xa0 && model <= 0xaf)); +} + /* * Determining AMD support for a PMU event requires consulting the AMD * PPR for the CPU or reference material derived therefrom. The AMD @@ -390,7 +396,8 @@ static bool use_amd_pmu(void) return host_cpu_is_amd && (is_zen1(family, model) || is_zen2(family, model) || - is_zen3(family, model)); + is_zen3(family, model) || + is_zen4(family, model)); } /*
PMU event filter test fails on zen4 architecture because of unavailability of family and model check for zen4 in use_amd_pmu(). So, add family and model check for zen4 architecture in use_amd_pmu(). Signed-off-by: Manali Shukla <manali.shukla@amd.com> --- .../testing/selftests/kvm/x86_64/pmu_event_filter_test.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)