diff mbox series

[v3,04/20] drm/i915/psr: Move printing PSR mode to own function

Message ID 20240527072220.3294769-5-jouni.hogander@intel.com (mailing list archive)
State New, archived
Headers show
Series Panel Replay eDP support | expand

Commit Message

Hogander, Jouni May 27, 2024, 7:22 a.m. UTC
intel_psr_status has grown and is about to grow even. Let's split it a bit
and move printing PSR mode to an own function.

v2: s/intel_psr_psr_mode/intel_psr_print_mode/

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 26 ++++++++++++++++--------
 1 file changed, 17 insertions(+), 9 deletions(-)

Comments

Manna, Animesh May 28, 2024, 6:30 a.m. UTC | #1
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Monday, May 27, 2024 12:52 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v3 04/20] drm/i915/psr: Move printing PSR mode to own
> function
> 
> intel_psr_status has grown and is about to grow even. Let's split it a bit and
> move printing PSR mode to an own function.
> 
> v2: s/intel_psr_psr_mode/intel_psr_print_mode/
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 26 ++++++++++++++++--------
>  1 file changed, 17 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 943de3ca39c2..dfd45f6d7edd 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -3605,13 +3605,28 @@ static void intel_psr_sink_capability(struct
> intel_dp *intel_dp,
>  		   str_yes_no(psr->sink_panel_replay_su_support));
>  }
> 
> +static void intel_psr_print_mode(struct intel_dp *intel_dp,
> +				 struct seq_file *m)
> +{
> +	struct intel_psr *psr = &intel_dp->psr;
> +	const char *status;
> +
> +	if (psr->panel_replay_enabled)
> +		status = psr->sel_update_enabled ? "Panel Replay Selective
> Update Enabled" :
> +			"Panel Replay Enabled";
> +	else if (psr->enabled)
> +		status = psr->sel_update_enabled ? "PSR2" : "PSR1";
> +	else
> +		status = "disabled";
> +	seq_printf(m, "PSR mode: %s\n", status); }
> +
>  static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
>  	struct intel_psr *psr = &intel_dp->psr;
>  	intel_wakeref_t wakeref;
> -	const char *status;
>  	bool enabled;
>  	u32 val;
> 
> @@ -3623,14 +3638,7 @@ static int intel_psr_status(struct seq_file *m,
> struct intel_dp *intel_dp)
>  	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>  	mutex_lock(&psr->lock);
> 
> -	if (psr->panel_replay_enabled)
> -		status = psr->sel_update_enabled ? "Panel Replay Selective
> Update Enabled" :
> -			"Panel Replay Enabled";
> -	else if (psr->enabled)
> -		status = psr->sel_update_enabled ? "PSR2" : "PSR1";
> -	else
> -		status = "disabled";
> -	seq_printf(m, "PSR mode: %s\n", status);
> +	intel_psr_print_mode(intel_dp, m);
> 
>  	if (!psr->enabled) {
>  		seq_printf(m, "PSR sink not reliable: %s\n",
> --
> 2.34.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 943de3ca39c2..dfd45f6d7edd 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3605,13 +3605,28 @@  static void intel_psr_sink_capability(struct intel_dp *intel_dp,
 		   str_yes_no(psr->sink_panel_replay_su_support));
 }
 
+static void intel_psr_print_mode(struct intel_dp *intel_dp,
+				 struct seq_file *m)
+{
+	struct intel_psr *psr = &intel_dp->psr;
+	const char *status;
+
+	if (psr->panel_replay_enabled)
+		status = psr->sel_update_enabled ? "Panel Replay Selective Update Enabled" :
+			"Panel Replay Enabled";
+	else if (psr->enabled)
+		status = psr->sel_update_enabled ? "PSR2" : "PSR1";
+	else
+		status = "disabled";
+	seq_printf(m, "PSR mode: %s\n", status);
+}
+
 static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
 	struct intel_psr *psr = &intel_dp->psr;
 	intel_wakeref_t wakeref;
-	const char *status;
 	bool enabled;
 	u32 val;
 
@@ -3623,14 +3638,7 @@  static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
 	mutex_lock(&psr->lock);
 
-	if (psr->panel_replay_enabled)
-		status = psr->sel_update_enabled ? "Panel Replay Selective Update Enabled" :
-			"Panel Replay Enabled";
-	else if (psr->enabled)
-		status = psr->sel_update_enabled ? "PSR2" : "PSR1";
-	else
-		status = "disabled";
-	seq_printf(m, "PSR mode: %s\n", status);
+	intel_psr_print_mode(intel_dp, m);
 
 	if (!psr->enabled) {
 		seq_printf(m, "PSR sink not reliable: %s\n",