diff mbox series

[v3,07/20] drm/i915/psr: Add Early Transport into psr debugfs interface

Message ID 20240527072220.3294769-8-jouni.hogander@intel.com (mailing list archive)
State New, archived
Headers show
Series Panel Replay eDP support | expand

Commit Message

Hogander, Jouni May 27, 2024, 7:22 a.m. UTC
We want to have sink Early Transport capability and usage in our psr
debugfs status interface.

v3: remove extra space from "PSR mode:  disabled"
v2: printout "Selective Update enabled (Early Transport)" instead of
    "Selective Update Early Transport enabled"

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 36 ++++++++++++++++++------
 1 file changed, 28 insertions(+), 8 deletions(-)

Comments

Manna, Animesh May 29, 2024, 7:21 a.m. UTC | #1
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Monday, May 27, 2024 12:52 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v3 07/20] drm/i915/psr: Add Early Transport into psr
> debugfs interface
> 
> We want to have sink Early Transport capability and usage in our psr debugfs
> status interface.
> 
> v3: remove extra space from "PSR mode:  disabled"
> v2: printout "Selective Update enabled (Early Transport)" instead of
>     "Selective Update Early Transport enabled"
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 36 ++++++++++++++++++------
>  1 file changed, 28 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index a01c2173a2e5..fa12267f851f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -3603,25 +3603,45 @@ static void intel_psr_sink_capability(struct
> intel_dp *intel_dp,
> 
>  	if (psr->sink_support)
>  		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
> +	if (intel_dp->psr_dpcd[0] ==
> DP_PSR2_WITH_Y_COORD_ET_SUPPORTED)
> +		seq_printf(m, " (Early Transport)");
>  	seq_printf(m, ", Panel Replay = %s", str_yes_no(psr-
> >sink_panel_replay_support));
> -	seq_printf(m, ", Panel Replay Selective Update = %s\n",
> +	seq_printf(m, ", Panel Replay Selective Update = %s",
>  		   str_yes_no(psr->sink_panel_replay_su_support));
> +	if (intel_dp->pr_dpcd &
> DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT)
> +		seq_printf(m, " (Early Transport)");
> +	seq_printf(m, "\n");
>  }
> 
>  static void intel_psr_print_mode(struct intel_dp *intel_dp,
>  				 struct seq_file *m)
>  {
>  	struct intel_psr *psr = &intel_dp->psr;
> -	const char *status;
> +	const char *status, *mode, *region_et;
> 
> -	if (psr->panel_replay_enabled)
> -		status = psr->sel_update_enabled ? "Panel Replay Selective
> Update Enabled" :
> -			"Panel Replay Enabled";
> -	else if (psr->enabled)
> -		status = psr->sel_update_enabled ? "PSR2" : "PSR1";
> +	if (psr->enabled)
> +		status = " enabled";
>  	else
>  		status = "disabled";
> -	seq_printf(m, "PSR mode: %s\n", status);
> +
> +	if (psr->panel_replay_enabled && psr->sel_update_enabled)
> +		mode = "Panel Replay Selective Update";
> +	else if (psr->panel_replay_enabled)
> +		mode = "Panel Replay";
> +	else if (psr->sel_update_enabled)
> +		mode = "PSR2";
> +	else if (psr->enabled)
> +		mode = "PSR1";
> +	else
> +		mode = "";
> +
> +	if (psr->sel_update_enabled &&
> +	    (psr2_su_region_et_valid(intel_dp, psr->panel_replay_enabled)))
> +		region_et = " (Early Transport)";
> +	else
> +		region_et = "";
> +
> +	seq_printf(m, "PSR mode: %s%s%s\n", mode, status, region_et);
>  }
> 
>  static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
> --
> 2.34.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a01c2173a2e5..fa12267f851f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3603,25 +3603,45 @@  static void intel_psr_sink_capability(struct intel_dp *intel_dp,
 
 	if (psr->sink_support)
 		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
+	if (intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED)
+		seq_printf(m, " (Early Transport)");
 	seq_printf(m, ", Panel Replay = %s", str_yes_no(psr->sink_panel_replay_support));
-	seq_printf(m, ", Panel Replay Selective Update = %s\n",
+	seq_printf(m, ", Panel Replay Selective Update = %s",
 		   str_yes_no(psr->sink_panel_replay_su_support));
+	if (intel_dp->pr_dpcd & DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT)
+		seq_printf(m, " (Early Transport)");
+	seq_printf(m, "\n");
 }
 
 static void intel_psr_print_mode(struct intel_dp *intel_dp,
 				 struct seq_file *m)
 {
 	struct intel_psr *psr = &intel_dp->psr;
-	const char *status;
+	const char *status, *mode, *region_et;
 
-	if (psr->panel_replay_enabled)
-		status = psr->sel_update_enabled ? "Panel Replay Selective Update Enabled" :
-			"Panel Replay Enabled";
-	else if (psr->enabled)
-		status = psr->sel_update_enabled ? "PSR2" : "PSR1";
+	if (psr->enabled)
+		status = " enabled";
 	else
 		status = "disabled";
-	seq_printf(m, "PSR mode: %s\n", status);
+
+	if (psr->panel_replay_enabled && psr->sel_update_enabled)
+		mode = "Panel Replay Selective Update";
+	else if (psr->panel_replay_enabled)
+		mode = "Panel Replay";
+	else if (psr->sel_update_enabled)
+		mode = "PSR2";
+	else if (psr->enabled)
+		mode = "PSR1";
+	else
+		mode = "";
+
+	if (psr->sel_update_enabled &&
+	    (psr2_su_region_et_valid(intel_dp, psr->panel_replay_enabled)))
+		region_et = " (Early Transport)";
+	else
+		region_et = "";
+
+	seq_printf(m, "PSR mode: %s%s%s\n", mode, status, region_et);
 }
 
 static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)