| Message ID | 20240515073526.17297-3-Jiqian.Chen@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | S3 support | expand |
On Wed, May 15, 2024 at 03:35:26PM +0800, Jiqian Chen wrote: > In current code, when guest does S3, virtio-gpu are reset due to the > bit No_Soft_Reset is not set. After resetting, the display resources > of virtio-gpu are destroyed, then the display can't come back and only > show blank after resuming. > > Implement No_Soft_Reset bit of PCI_PM_CTRL register, then guest can check > this bit, if this bit is set, the devices resetting will not be done, and > then the display can work after resuming. > > No_Soft_Reset bit is implemented for all virtio devices, and was tested > only on virtio-gpu device. Set it false by default for safety. > > Signed-off-by: Jiqian Chen <Jiqian.Chen@amd.com> > --- > hw/virtio/virtio-pci.c | 37 ++++++++++++++++++++++++++++++++++ > include/hw/virtio/virtio-pci.h | 5 +++++ > 2 files changed, 42 insertions(+) > > diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c > index 1b63bcb3f15c..3052528c0730 100644 > --- a/hw/virtio/virtio-pci.c > +++ b/hw/virtio/virtio-pci.c > @@ -2230,6 +2230,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) > pcie_cap_lnkctl_init(pci_dev); > } > > + if (proxy->flags & VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET) { > + pci_set_word(pci_dev->config + pos + PCI_PM_CTRL, > + PCI_PM_CTRL_NO_SOFT_RESET); > + } > + > if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { > /* Init Power Management Control Register */ > pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, > @@ -2292,11 +2297,37 @@ static void virtio_pci_reset(DeviceState *qdev) > } > } > > +static bool virtio_pci_no_soft_reset(PCIDevice *dev) > +{ > + uint16_t pmcsr; > + > + if (!pci_is_express(dev) || !dev->exp.pm_cap) { > + return false; > + } > + > + pmcsr = pci_get_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL); > + > + /* > + * When No_Soft_Reset bit is set and the device > + * is in D3hot state, don't reset device > + */ > + return (pmcsr & PCI_PM_CTRL_NO_SOFT_RESET) && > + (pmcsr & PCI_PM_CTRL_STATE_MASK) == 3; > +} > + > static void virtio_pci_bus_reset_hold(Object *obj, ResetType type) > { > PCIDevice *dev = PCI_DEVICE(obj); > DeviceState *qdev = DEVICE(obj); > > + /* > + * Note that: a proposal to add SUSPEND bit is being discussed, > + * may need to consider the state of SUSPEND bit in future > + */ > + if (virtio_pci_no_soft_reset(dev)) { > + return; > + } > + > virtio_pci_reset(qdev); > > if (pci_is_express(dev)) { > @@ -2336,6 +2367,12 @@ static Property virtio_pci_properties[] = { > VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), > DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, > VIRTIO_PCI_FLAG_INIT_PM_BIT, true), > + /* > + * For safety, set this false by default, if change it to true, > + * need to consider compatible for old machine > + */ I think you should do exactly that, and make the name start with "x-". It's not reasonable to tell users "set it to true, conduct your own QE testing". Neither do we want to double the amount of QE work with each bugfix. If for some reason you want this true only for the gpu, you can do that too. > + DEFINE_PROP_BIT("pcie-pm-no-soft-reset", VirtIOPCIProxy, flags, > + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, false), > DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags, > VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), > DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, > diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h > index 59d88018c16a..9e67ba38c748 100644 > --- a/include/hw/virtio/virtio-pci.h > +++ b/include/hw/virtio/virtio-pci.h > @@ -43,6 +43,7 @@ enum { > VIRTIO_PCI_FLAG_INIT_FLR_BIT, > VIRTIO_PCI_FLAG_AER_BIT, > VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, > + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, > }; > > /* Need to activate work-arounds for buggy guests at vmstate load. */ > @@ -79,6 +80,10 @@ enum { > /* Init Power Management */ > #define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT) > > +/* Init The No_Soft_Reset bit of Power Management */ > +#define VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET \ > + (1 << VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT) > + > /* Init Function Level Reset capability */ > #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT) > > -- > 2.34.1
On 2024/6/2 22:33, Michael S. Tsirkin wrote: > On Wed, May 15, 2024 at 03:35:26PM +0800, Jiqian Chen wrote: >> In current code, when guest does S3, virtio-gpu are reset due to the >> bit No_Soft_Reset is not set. After resetting, the display resources >> of virtio-gpu are destroyed, then the display can't come back and only >> show blank after resuming. >> >> Implement No_Soft_Reset bit of PCI_PM_CTRL register, then guest can check >> this bit, if this bit is set, the devices resetting will not be done, and >> then the display can work after resuming. >> >> No_Soft_Reset bit is implemented for all virtio devices, and was tested >> only on virtio-gpu device. Set it false by default for safety. >> >> Signed-off-by: Jiqian Chen <Jiqian.Chen@amd.com> >> --- >> hw/virtio/virtio-pci.c | 37 ++++++++++++++++++++++++++++++++++ >> include/hw/virtio/virtio-pci.h | 5 +++++ >> 2 files changed, 42 insertions(+) >> >> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c >> index 1b63bcb3f15c..3052528c0730 100644 >> --- a/hw/virtio/virtio-pci.c >> +++ b/hw/virtio/virtio-pci.c >> @@ -2230,6 +2230,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) >> pcie_cap_lnkctl_init(pci_dev); >> } >> >> + if (proxy->flags & VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET) { >> + pci_set_word(pci_dev->config + pos + PCI_PM_CTRL, >> + PCI_PM_CTRL_NO_SOFT_RESET); >> + } >> + >> if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { >> /* Init Power Management Control Register */ >> pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, >> @@ -2292,11 +2297,37 @@ static void virtio_pci_reset(DeviceState *qdev) >> } >> } >> >> +static bool virtio_pci_no_soft_reset(PCIDevice *dev) >> +{ >> + uint16_t pmcsr; >> + >> + if (!pci_is_express(dev) || !dev->exp.pm_cap) { >> + return false; >> + } >> + >> + pmcsr = pci_get_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL); >> + >> + /* >> + * When No_Soft_Reset bit is set and the device >> + * is in D3hot state, don't reset device >> + */ >> + return (pmcsr & PCI_PM_CTRL_NO_SOFT_RESET) && >> + (pmcsr & PCI_PM_CTRL_STATE_MASK) == 3; >> +} >> + >> static void virtio_pci_bus_reset_hold(Object *obj, ResetType type) >> { >> PCIDevice *dev = PCI_DEVICE(obj); >> DeviceState *qdev = DEVICE(obj); >> >> + /* >> + * Note that: a proposal to add SUSPEND bit is being discussed, >> + * may need to consider the state of SUSPEND bit in future >> + */ >> + if (virtio_pci_no_soft_reset(dev)) { >> + return; >> + } >> + >> virtio_pci_reset(qdev); >> >> if (pci_is_express(dev)) { >> @@ -2336,6 +2367,12 @@ static Property virtio_pci_properties[] = { >> VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), >> DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, >> VIRTIO_PCI_FLAG_INIT_PM_BIT, true), >> + /* >> + * For safety, set this false by default, if change it to true, >> + * need to consider compatible for old machine >> + */ > > I think you should do exactly that, and make the name start with > "x-". It's not reasonable to tell users "set it to true, conduct your own QE > testing". Neither do we want to double the amount of QE work with > each bugfix. OK, so you still insist on needing to consider the compatibility for old machine. Can you give me some tips on which old machines do not require this feature(No_Soft_Reset bit)? That will be helpful. > > If for some reason you want this true only for the gpu, you can do that too. > > >> + DEFINE_PROP_BIT("pcie-pm-no-soft-reset", VirtIOPCIProxy, flags, >> + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, false), >> DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags, >> VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), >> DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, >> diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h >> index 59d88018c16a..9e67ba38c748 100644 >> --- a/include/hw/virtio/virtio-pci.h >> +++ b/include/hw/virtio/virtio-pci.h >> @@ -43,6 +43,7 @@ enum { >> VIRTIO_PCI_FLAG_INIT_FLR_BIT, >> VIRTIO_PCI_FLAG_AER_BIT, >> VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, >> + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, >> }; >> >> /* Need to activate work-arounds for buggy guests at vmstate load. */ >> @@ -79,6 +80,10 @@ enum { >> /* Init Power Management */ >> #define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT) >> >> +/* Init The No_Soft_Reset bit of Power Management */ >> +#define VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET \ >> + (1 << VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT) >> + >> /* Init Function Level Reset capability */ >> #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT) >> >> -- >> 2.34.1 >
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 1b63bcb3f15c..3052528c0730 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -2230,6 +2230,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) pcie_cap_lnkctl_init(pci_dev); } + if (proxy->flags & VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET) { + pci_set_word(pci_dev->config + pos + PCI_PM_CTRL, + PCI_PM_CTRL_NO_SOFT_RESET); + } + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { /* Init Power Management Control Register */ pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, @@ -2292,11 +2297,37 @@ static void virtio_pci_reset(DeviceState *qdev) } } +static bool virtio_pci_no_soft_reset(PCIDevice *dev) +{ + uint16_t pmcsr; + + if (!pci_is_express(dev) || !dev->exp.pm_cap) { + return false; + } + + pmcsr = pci_get_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL); + + /* + * When No_Soft_Reset bit is set and the device + * is in D3hot state, don't reset device + */ + return (pmcsr & PCI_PM_CTRL_NO_SOFT_RESET) && + (pmcsr & PCI_PM_CTRL_STATE_MASK) == 3; +} + static void virtio_pci_bus_reset_hold(Object *obj, ResetType type) { PCIDevice *dev = PCI_DEVICE(obj); DeviceState *qdev = DEVICE(obj); + /* + * Note that: a proposal to add SUSPEND bit is being discussed, + * may need to consider the state of SUSPEND bit in future + */ + if (virtio_pci_no_soft_reset(dev)) { + return; + } + virtio_pci_reset(qdev); if (pci_is_express(dev)) { @@ -2336,6 +2367,12 @@ static Property virtio_pci_properties[] = { VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_INIT_PM_BIT, true), + /* + * For safety, set this false by default, if change it to true, + * need to consider compatible for old machine + */ + DEFINE_PROP_BIT("pcie-pm-no-soft-reset", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, false), DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 59d88018c16a..9e67ba38c748 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -43,6 +43,7 @@ enum { VIRTIO_PCI_FLAG_INIT_FLR_BIT, VIRTIO_PCI_FLAG_AER_BIT, VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, + VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT, }; /* Need to activate work-arounds for buggy guests at vmstate load. */ @@ -79,6 +80,10 @@ enum { /* Init Power Management */ #define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT) +/* Init The No_Soft_Reset bit of Power Management */ +#define VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET \ + (1 << VIRTIO_PCI_FLAG_PM_NO_SOFT_RESET_BIT) + /* Init Function Level Reset capability */ #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT)
In current code, when guest does S3, virtio-gpu are reset due to the bit No_Soft_Reset is not set. After resetting, the display resources of virtio-gpu are destroyed, then the display can't come back and only show blank after resuming. Implement No_Soft_Reset bit of PCI_PM_CTRL register, then guest can check this bit, if this bit is set, the devices resetting will not be done, and then the display can work after resuming. No_Soft_Reset bit is implemented for all virtio devices, and was tested only on virtio-gpu device. Set it false by default for safety. Signed-off-by: Jiqian Chen <Jiqian.Chen@amd.com> --- hw/virtio/virtio-pci.c | 37 ++++++++++++++++++++++++++++++++++ include/hw/virtio/virtio-pci.h | 5 +++++ 2 files changed, 42 insertions(+)