diff mbox series

target/loongarch: fix a wrong print in cpu dump

Message ID 20240604073831.666690-1-lanyanzhi22b@ict.ac.cn (mailing list archive)
State New, archived
Headers show
Series target/loongarch: fix a wrong print in cpu dump | expand

Commit Message

lanyanzhi22b@ict.ac.cn June 4, 2024, 7:38 a.m. UTC
From: lanyanzhi <lanyanzhi22b@ict.ac.cn>

description:
    loongarch_cpu_dump_state() want to dump all loongarch cpu
state registers, but there is a tiny typographical error when
printing "PRCFG2".

Signed-off-by: lanyanzhi <lanyanzhi22b@ict.ac.cn>
---
 target/loongarch/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Henderson June 4, 2024, 2 p.m. UTC | #1
On 6/4/24 02:38, lanyanzhi22b@ict.ac.cn wrote:
> From: lanyanzhi<lanyanzhi22b@ict.ac.cn>
> 
> description:
>      loongarch_cpu_dump_state() want to dump all loongarch cpu
> state registers, but there is a tiny typographical error when
> printing "PRCFG2".
> 
> Signed-off-by: lanyanzhi<lanyanzhi22b@ict.ac.cn>
> ---
>   target/loongarch/cpu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
gaosong June 5, 2024, 1:21 a.m. UTC | #2
在 2024/6/4 下午3:38, lanyanzhi22b@ict.ac.cn 写道:
> From: lanyanzhi <lanyanzhi22b@ict.ac.cn>
>
> description:
>      loongarch_cpu_dump_state() want to dump all loongarch cpu
> state registers, but there is a tiny typographical error when
> printing "PRCFG2".
>
> Signed-off-by: lanyanzhi <lanyanzhi22b@ict.ac.cn>
> ---
>   target/loongarch/cpu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Song Gao <gaosong@loongson.cn>

Thanks.
Song Gao
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index b5c1ec94af..270f711f11 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -707,7 +707,7 @@ void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
>       qemu_fprintf(f, "EENTRY=%016" PRIx64 "\n", env->CSR_EENTRY);
>       qemu_fprintf(f, "PRCFG1=%016" PRIx64 ", PRCFG2=%016" PRIx64 ","
>                    " PRCFG3=%016" PRIx64 "\n",
> -                 env->CSR_PRCFG1, env->CSR_PRCFG3, env->CSR_PRCFG3);
> +                 env->CSR_PRCFG1, env->CSR_PRCFG2, env->CSR_PRCFG3);
>       qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY);
>       qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV);
>       qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA);
diff mbox series

Patch

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index b5c1ec94af..270f711f11 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -707,7 +707,7 @@  void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
     qemu_fprintf(f, "EENTRY=%016" PRIx64 "\n", env->CSR_EENTRY);
     qemu_fprintf(f, "PRCFG1=%016" PRIx64 ", PRCFG2=%016" PRIx64 ","
                  " PRCFG3=%016" PRIx64 "\n",
-                 env->CSR_PRCFG1, env->CSR_PRCFG3, env->CSR_PRCFG3);
+                 env->CSR_PRCFG1, env->CSR_PRCFG2, env->CSR_PRCFG3);
     qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY);
     qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV);
     qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA);