diff mbox series

[1/5] clk: rockchip: rk3128: Drop CLK_NR_CLKS usage

Message ID 20240605205209.232005-1-knaerzche@gmail.com (mailing list archive)
State Awaiting Upstream, archived
Headers show
Series [1/5] clk: rockchip: rk3128: Drop CLK_NR_CLKS usage | expand

Commit Message

Alex Bee June 5, 2024, 8:51 p.m. UTC
Similar to
commit 2dc66a5ab2c6 ("clk: rockchip: rk3588: fix CLK_NR_CLKS usage")
this drops CLK_NR_CLKS usage from the clock driver and instead uses the
rockchip_clk_find_max_clk_id helper which was introduced for that purpose.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
 drivers/clk/rockchip/clk-rk3128.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

Comments

Alex Bee June 5, 2024, 8:52 p.m. UTC | #1
This series adds support for the Serial Flash Controller (SFC) found in
RK3128 SoCs.

As without using some "id holes" we would run out clock ids in the binding
and would have to touch the ABI, I added patches which removes the
CLK_NR_CLKS macro and uses the recently introduced
rockchip_clk_find_max_clk_id helper instead to find the highest clock id.

changes since v1:
 - added patches to remove CLK_NR_CLKS (Connor)

Link to v1:
https://lore.kernel.org/all/20240605172154.193047-1-knaerzche@gmail.com/

Alex Bee (5):
  clk: rockchip: rk3128: Drop CLK_NR_CLKS usage
  dt-bindings: clock: rk3128: Drop CLK_NR_CLKS
  dt-bindings: clock: rk3128: Add HCLK_SFC
  clk: rockchip: Add HCLK_SFC for RK3128
  ARM: dts: rockchip: Add SFC for RK3128

 arch/arm/boot/dts/rockchip/rk3128.dtsi | 35 ++++++++++++++++++++++++++
 drivers/clk/rockchip/clk-rk3128.c      | 21 +++++++++++++---
 include/dt-bindings/clock/rk3128-cru.h |  2 +-
 3 files changed, 53 insertions(+), 5 deletions(-)


base-commit: 234cb065ad82915ff8d06ce01e01c3e640b674d2
Alex Bee June 5, 2024, 9:03 p.m. UTC | #2
Hi,
sorry for the noise - not sure what went wrong here.
Just resend v2:
https://lore.kernel.org/all/20240605210049.232284-1-knaerzche@gmail.com/

Alex
Am 05.06.24 um 22:51 schrieb Alex Bee:
> Similar to
> commit 2dc66a5ab2c6 ("clk: rockchip: rk3588: fix CLK_NR_CLKS usage")
> this drops CLK_NR_CLKS usage from the clock driver and instead uses the
> rockchip_clk_find_max_clk_id helper which was introduced for that purpose.
> 
> Signed-off-by: Alex Bee <knaerzche@gmail.com>
> ---
>   drivers/clk/rockchip/clk-rk3128.c | 20 ++++++++++++++++----
>   1 file changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
> index d076b7971f33..40e0e4556d59 100644
> --- a/drivers/clk/rockchip/clk-rk3128.c
> +++ b/drivers/clk/rockchip/clk-rk3128.c
> @@ -569,18 +569,22 @@ static const char *const rk3128_critical_clocks[] __initconst = {
>   	"sclk_timer5",
>   };
>   
> -static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
> +static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np,
> +								   unsigned long soc_nr_clks)
>   {
>   	struct rockchip_clk_provider *ctx;
> +	unsigned long common_nr_clks;
>   	void __iomem *reg_base;
>   
> +	common_nr_clks = rockchip_clk_find_max_clk_id(common_clk_branches,
> +						      ARRAY_SIZE(common_clk_branches)) + 1;
>   	reg_base = of_iomap(np, 0);
>   	if (!reg_base) {
>   		pr_err("%s: could not map cru region\n", __func__);
>   		return ERR_PTR(-ENOMEM);
>   	}
>   
> -	ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
> +	ctx = rockchip_clk_init(np, reg_base, max(common_nr_clks, soc_nr_clks));
>   	if (IS_ERR(ctx)) {
>   		pr_err("%s: rockchip clk init failed\n", __func__);
>   		iounmap(reg_base);
> @@ -609,8 +613,12 @@ static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device
>   static void __init rk3126_clk_init(struct device_node *np)
>   {
>   	struct rockchip_clk_provider *ctx;
> +	unsigned long soc_nr_clks;
>   
> -	ctx = rk3128_common_clk_init(np);
> +	soc_nr_clks = rockchip_clk_find_max_clk_id(rk3126_clk_branches,
> +						   ARRAY_SIZE(rk3126_clk_branches)) + 1;
> +
> +	ctx = rk3128_common_clk_init(np, soc_nr_clks);
>   	if (IS_ERR(ctx))
>   		return;
>   
> @@ -627,8 +635,12 @@ CLK_OF_DECLARE(rk3126_cru, "rockchip,rk3126-cru", rk3126_clk_init);
>   static void __init rk3128_clk_init(struct device_node *np)
>   {
>   	struct rockchip_clk_provider *ctx;
> +	unsigned long soc_nr_clks;
> +
> +	soc_nr_clks = rockchip_clk_find_max_clk_id(rk3128_clk_branches,
> +						   ARRAY_SIZE(rk3128_clk_branches)) + 1;
>   
> -	ctx = rk3128_common_clk_init(np);
> +	ctx = rk3128_common_clk_init(np, soc_nr_clks);
>   	if (IS_ERR(ctx))
>   		return;
>
Krzysztof Kozlowski June 6, 2024, 6:41 a.m. UTC | #3
On 05/06/2024 22:52, Alex Bee wrote:
> This series adds support for the Serial Flash Controller (SFC) found in
> RK3128 SoCs.
> 
> As without using some "id holes" we would run out clock ids in the binding
> and would have to touch the ABI, I added patches which removes the
> CLK_NR_CLKS macro and uses the recently introduced
> rockchip_clk_find_max_clk_id helper instead to find the highest clock id.
> 
> changes since v1:
>  - added patches to remove CLK_NR_CLKS (Connor)
> 

Do not attach (thread) your patchsets to some other threads (unrelated
or older versions). This buries them deep in the mailbox and might
interfere with applying entire sets.

You sent now v2 immediately after. Confused.

Best regards,
Krzysztof
Heiko Stuebner June 6, 2024, 7:37 a.m. UTC | #4
Am Donnerstag, 6. Juni 2024, 08:41:19 CEST schrieb Krzysztof Kozlowski:
> On 05/06/2024 22:52, Alex Bee wrote:
> > This series adds support for the Serial Flash Controller (SFC) found in
> > RK3128 SoCs.
> > 
> > As without using some "id holes" we would run out clock ids in the binding
> > and would have to touch the ABI, I added patches which removes the
> > CLK_NR_CLKS macro and uses the recently introduced
> > rockchip_clk_find_max_clk_id helper instead to find the highest clock id.
> > 
> > changes since v1:
> >  - added patches to remove CLK_NR_CLKS (Connor)
> > 
> 
> Do not attach (thread) your patchsets to some other threads (unrelated
> or older versions). This buries them deep in the mailbox and might
> interfere with applying entire sets.
> 
> You sent now v2 immediately after. Confused.

it looks like Alex had some mail trouble yesterday.

The thread you Acked patches in actually is v2, just missing the label.

- original v1: https://lore.kernel.org/linux-rockchip/20240605172154.193047-1-knaerzche@gmail.com

- "unlabeled" v2: https://lore.kernel.org/linux-rockchip/20240605205209.232005-1-knaerzche@gmail.com/
- this as v2, but as reply to the previous
- real v2: https://lore.kernel.org/linux-rockchip/20240605210049.232284-1-knaerzche@gmail.com/

The last 3 are identical, just the sending process was somehow fumbled.
Alex Bee June 6, 2024, 10:12 a.m. UTC | #5
Hi Heiko, Hi Krzysztof,

Am 06.06.24 um 09:37 schrieb Heiko Stübner:
> Am Donnerstag, 6. Juni 2024, 08:41:19 CEST schrieb Krzysztof Kozlowski:
>> On 05/06/2024 22:52, Alex Bee wrote:
>>> This series adds support for the Serial Flash Controller (SFC) found in
>>> RK3128 SoCs.
>>>
>>> As without using some "id holes" we would run out clock ids in the binding
>>> and would have to touch the ABI, I added patches which removes the
>>> CLK_NR_CLKS macro and uses the recently introduced
>>> rockchip_clk_find_max_clk_id helper instead to find the highest clock id.
>>>
>>> changes since v1:
>>>   - added patches to remove CLK_NR_CLKS (Connor)
>>>
>> Do not attach (thread) your patchsets to some other threads (unrelated
>> or older versions). This buries them deep in the mailbox and might
>> interfere with applying entire sets.
>>
>> You sent now v2 immediately after. Confused.
> it looks like Alex had some mail trouble yesterday.
>
> The thread you Acked patches in actually is v2, just missing the label.
>
> - original v1: https://lore.kernel.org/linux-rockchip/20240605172154.193047-1-knaerzche@gmail.com
>
> - "unlabeled" v2: https://lore.kernel.org/linux-rockchip/20240605205209.232005-1-knaerzche@gmail.com/
> - this as v2, but as reply to the previous
> - real v2: https://lore.kernel.org/linux-rockchip/20240605210049.232284-1-knaerzche@gmail.com/
>
> The last 3 are identical, just the sending process was somehow fumbled.
Yes, that's why I replied to the first message in the messed-up thread
explaining it a bit:
https://lore.kernel.org/all/9da22443-b5c3-4fbc-8cb0-d6bebab55da4@gmail.com/
Anyway: To make it a bit less confusing, I'll send v3 with Krzysztof's acks
included.

Alex
>
>
diff mbox series

Patch

diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index d076b7971f33..40e0e4556d59 100644
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -569,18 +569,22 @@  static const char *const rk3128_critical_clocks[] __initconst = {
 	"sclk_timer5",
 };
 
-static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
+static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np,
+								   unsigned long soc_nr_clks)
 {
 	struct rockchip_clk_provider *ctx;
+	unsigned long common_nr_clks;
 	void __iomem *reg_base;
 
+	common_nr_clks = rockchip_clk_find_max_clk_id(common_clk_branches,
+						      ARRAY_SIZE(common_clk_branches)) + 1;
 	reg_base = of_iomap(np, 0);
 	if (!reg_base) {
 		pr_err("%s: could not map cru region\n", __func__);
 		return ERR_PTR(-ENOMEM);
 	}
 
-	ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
+	ctx = rockchip_clk_init(np, reg_base, max(common_nr_clks, soc_nr_clks));
 	if (IS_ERR(ctx)) {
 		pr_err("%s: rockchip clk init failed\n", __func__);
 		iounmap(reg_base);
@@ -609,8 +613,12 @@  static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device
 static void __init rk3126_clk_init(struct device_node *np)
 {
 	struct rockchip_clk_provider *ctx;
+	unsigned long soc_nr_clks;
 
-	ctx = rk3128_common_clk_init(np);
+	soc_nr_clks = rockchip_clk_find_max_clk_id(rk3126_clk_branches,
+						   ARRAY_SIZE(rk3126_clk_branches)) + 1;
+
+	ctx = rk3128_common_clk_init(np, soc_nr_clks);
 	if (IS_ERR(ctx))
 		return;
 
@@ -627,8 +635,12 @@  CLK_OF_DECLARE(rk3126_cru, "rockchip,rk3126-cru", rk3126_clk_init);
 static void __init rk3128_clk_init(struct device_node *np)
 {
 	struct rockchip_clk_provider *ctx;
+	unsigned long soc_nr_clks;
+
+	soc_nr_clks = rockchip_clk_find_max_clk_id(rk3128_clk_branches,
+						   ARRAY_SIZE(rk3128_clk_branches)) + 1;
 
-	ctx = rk3128_common_clk_init(np);
+	ctx = rk3128_common_clk_init(np, soc_nr_clks);
 	if (IS_ERR(ctx))
 		return;