| Message ID | 614e35baab65117ce7d5a64526b69b44e68116fe.1717514638.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: finish the job of removing implicit dev_priv | expand |
On Tue, Jun 04, 2024 at 06:26:04PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the _DSPBSURF register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/gvt/handlers.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c > index bb904266c3cd..88ef8b7b9ab4 100644 > --- a/drivers/gpu/drm/i915/gvt/handlers.c > +++ b/drivers/gpu/drm/i915/gvt/handlers.c > @@ -1009,7 +1009,7 @@ static int south_chicken2_mmio_write(struct intel_vgpu *vgpu, > } > > #define DSPSURF_TO_PIPE(offset) \ > - calc_index(offset, _DSPASURF, _DSPBSURF, 0, DSPSURF(dev_priv, PIPE_C)) > + calc_index(offset, _DSPASURF, _DSPBSURF(dev_priv), 0, DSPSURF(dev_priv, PIPE_C)) > > static int pri_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, > void *p_data, unsigned int bytes) > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 36ed23b93475..9bb840895baa 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2313,7 +2313,7 @@ > #define _DSPBSTRIDE(dev_priv) (DISPLAY_MMIO_BASE(dev_priv) + 0x71188) > #define _DSPBPOS(dev_priv) (DISPLAY_MMIO_BASE(dev_priv) + 0x7118C) > #define _DSPBSIZE(dev_priv) (DISPLAY_MMIO_BASE(dev_priv) + 0x71190) > -#define _DSPBSURF (DISPLAY_MMIO_BASE(dev_priv) + 0x7119C) > +#define _DSPBSURF(dev_priv) (DISPLAY_MMIO_BASE(dev_priv) + 0x7119C) > #define _DSPBTILEOFF (DISPLAY_MMIO_BASE(dev_priv) + 0x711A4) > #define _DSPBOFFSET (DISPLAY_MMIO_BASE(dev_priv) + 0x711A4) > #define _DSPBSURFLIVE (DISPLAY_MMIO_BASE(dev_priv) + 0x711AC) > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index bb904266c3cd..88ef8b7b9ab4 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -1009,7 +1009,7 @@ static int south_chicken2_mmio_write(struct intel_vgpu *vgpu, } #define DSPSURF_TO_PIPE(offset) \ - calc_index(offset, _DSPASURF, _DSPBSURF, 0, DSPSURF(dev_priv, PIPE_C)) + calc_index(offset, _DSPASURF, _DSPBSURF(dev_priv), 0, DSPSURF(dev_priv, PIPE_C)) static int pri_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 36ed23b93475..9bb840895baa 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2313,7 +2313,7 @@ #define _DSPBSTRIDE(dev_priv) (DISPLAY_MMIO_BASE(dev_priv) + 0x71188) #define _DSPBPOS(dev_priv) (DISPLAY_MMIO_BASE(dev_priv) + 0x7118C) #define _DSPBSIZE(dev_priv) (DISPLAY_MMIO_BASE(dev_priv) + 0x71190) -#define _DSPBSURF (DISPLAY_MMIO_BASE(dev_priv) + 0x7119C) +#define _DSPBSURF(dev_priv) (DISPLAY_MMIO_BASE(dev_priv) + 0x7119C) #define _DSPBTILEOFF (DISPLAY_MMIO_BASE(dev_priv) + 0x711A4) #define _DSPBOFFSET (DISPLAY_MMIO_BASE(dev_priv) + 0x711A4) #define _DSPBSURFLIVE (DISPLAY_MMIO_BASE(dev_priv) + 0x711AC)
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the _DSPBSURF register macro. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/gvt/handlers.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)