diff mbox series

[1/1] arm64: dts: imx8dxl-evk: add imx8dxl_cm4, lsio mu5, related memory region

Message ID 20240605202703.1220203-1-Frank.Li@nxp.com (mailing list archive)
State Superseded
Headers show
Series [1/1] arm64: dts: imx8dxl-evk: add imx8dxl_cm4, lsio mu5, related memory region | expand

Commit Message

Frank Li June 5, 2024, 8:27 p.m. UTC
Add imx8dxl_cm4, lsio mu5 and related memory region.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 48 +++++++++++++++++++
 1 file changed, 48 insertions(+)

Comments

Peng Fan June 6, 2024, 1:39 a.m. UTC | #1
> Subject: [PATCH 1/1] arm64: dts: imx8dxl-evk: add imx8dxl_cm4, lsio mu5,
> related memory region
> 
> Add imx8dxl_cm4, lsio mu5 and related memory region.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> index 4ac96a0586294..c5e601b98cf8f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> @@ -24,6 +24,19 @@ chosen {
>  		stdout-path = &lpuart0;
>  	};
> 
> +	imx8dxl-cm4 {
> +		compatible = "fsl,imx8qxp-cm4";
> +		clocks = <&clk_dummy>;
> +		mbox-names = "tx", "rx", "rxdb";
> +		mboxes = <&lsio_mu5 0 1 &lsio_mu5 1 1 &lsio_mu5 3 1>;
> +		memory-region = <&vdevbuffer>, <&vdev0vring0>,
> <&vdev0vring1>,
> +				<&vdev1vring0>, <&vdev1vring1>,
> <&rsc_table>;
> +		power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd
> IMX_SC_R_M4_0_MU_1A>;
> +		fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
> +		fsl,entry-address = <0x34fe0000>;
> +	};
> +
> +
>  	memory@80000000 {
>  		device_type = "memory";
>  		reg = <0x00000000 0x80000000 0 0x40000000>; @@ -51,6
> +64,37 @@ linux,cma {
>  			alloc-ranges = <0 0x98000000 0 0x14000000>;
>  			linux,cma-default;
>  		};
> +
> +		vdev0vring0: memory0@90000000 {
> +			reg = <0 0x90000000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev0vring1: memory@90008000 {
> +			reg = <0 0x90008000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev1vring0: memory@90010000 {
> +			reg = <0 0x90010000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev1vring1: memory@90018000 {
> +			reg = <0 0x90018000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		rsc_table: memory-rsc-table@900ff000 {
> +			reg = <0 0x900ff000 0 0x1000>;
> +			no-map;
> +		};
> +
> +		vdevbuffer: memory-vdevbuffer {
> +			compatible = "shared-dma-pool";
> +			reg = <0 0x90400000 0 0x100000>;
> +			no-map;
> +		};
>  	};
> 
>  	m2_uart1_sel: regulator-m2uart1sel {
> @@ -505,6 +549,10 @@ &lpuart1 {
>  	status = "okay";
>  };
> 
> +&lsio_mu5 {
> +	status = "okay";
> +};
> +
>  &flexcan2 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_flexcan2>;
> --
> 2.34.1
>
Rob Herring (Arm) June 6, 2024, 3:56 p.m. UTC | #2
On Wed, 05 Jun 2024 16:27:03 -0400, Frank Li wrote:
> Add imx8dxl_cm4, lsio mu5 and related memory region.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y freescale/imx8dxl-evk.dtb' for 20240605202703.1220203-1-Frank.Li@nxp.com:

arch/arm64/boot/dts/freescale/imx8dxl-evk.dtb: imx8dxl-cm4: power-domains: [[14, 278], [14, 297]] is too short
	from schema $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
Frank Li June 6, 2024, 4:18 p.m. UTC | #3
On Thu, Jun 06, 2024 at 09:56:14AM -0600, Rob Herring (Arm) wrote:
> 
> On Wed, 05 Jun 2024 16:27:03 -0400, Frank Li wrote:
> > Add imx8dxl_cm4, lsio mu5 and related memory region.
> > 
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 48 +++++++++++++++++++
> >  1 file changed, 48 insertions(+)
> > 
> 
> 
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
> 
> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to reply
> unless the platform maintainer has comments.
> 
> If you already ran DT checks and didn't see these error(s), then
> make sure dt-schema is up to date:
> 
>   pip3 install dtschema --upgrade
> 
> 
> New warnings running 'make CHECK_DTBS=y freescale/imx8dxl-evk.dtb' for 20240605202703.1220203-1-Frank.Li@nxp.com:
> 
> arch/arm64/boot/dts/freescale/imx8dxl-evk.dtb: imx8dxl-cm4: power-domains: [[14, 278], [14, 297]] is too short
> 	from schema $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#

Rob:

Fixed patch already sent before send this patch. 

https://lore.kernel.org/imx/20240606150030.3067015-1-Frank.Li@nxp.com/T/#u

Do I need sent both patch together? I faced many similar cases.

Frank Li

> 
> 
> 
> 
>
kernel test robot June 8, 2024, 12:25 a.m. UTC | #4
Hi Frank,

kernel test robot noticed the following build warnings:

[auto build test WARNING on shawnguo/for-next]
[also build test WARNING on linus/master v6.10-rc2 next-20240607]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Frank-Li/arm64-dts-imx8dxl-evk-add-imx8dxl_cm4-lsio-mu5-related-memory-region/20240606-043044
base:   https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
patch link:    https://lore.kernel.org/r/20240605202703.1220203-1-Frank.Li%40nxp.com
patch subject: [PATCH 1/1] arm64: dts: imx8dxl-evk: add imx8dxl_cm4, lsio mu5, related memory region
compiler: aarch64-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240608/202406081020.qpqcI5FG-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202406081020.qpqcI5FG-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
>> arch/arm64/boot/dts/freescale/imx8dxl-evk.dts:93.33-97.5: Warning (unit_address_vs_reg): /reserved-memory/memory-vdevbuffer: node has a reg or ranges property, but no unit name

vim +93 arch/arm64/boot/dts/freescale/imx8dxl-evk.dts

     9	
    10	/ {
    11		model = "Freescale i.MX8DXL EVK";
    12		compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
    13	
    14		aliases {
    15			i2c2 = &i2c2;
    16			mmc0 = &usdhc1;
    17			mmc1 = &usdhc2;
    18			serial0 = &lpuart0;
    19			serial1 = &lpuart1;
    20			serial6 = &cm40_lpuart;
    21		};
    22	
    23		chosen {
    24			stdout-path = &lpuart0;
    25		};
    26	
    27		imx8dxl-cm4 {
    28			compatible = "fsl,imx8qxp-cm4";
    29			clocks = <&clk_dummy>;
    30			mbox-names = "tx", "rx", "rxdb";
    31			mboxes = <&lsio_mu5 0 1 &lsio_mu5 1 1 &lsio_mu5 3 1>;
    32			memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
    33					<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
    34			power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
    35			fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
    36			fsl,entry-address = <0x34fe0000>;
    37		};
    38	
    39	
    40		memory@80000000 {
    41			device_type = "memory";
    42			reg = <0x00000000 0x80000000 0 0x40000000>;
    43		};
    44	
    45		reserved-memory {
    46			#address-cells = <2>;
    47			#size-cells = <2>;
    48			ranges;
    49	
    50			/*
    51			 * Memory reserved for optee usage. Please do not use.
    52			 * This will be automatically added to dtb if OP-TEE is installed.
    53			 * optee@96000000 {
    54			 *     reg = <0 0x96000000 0 0x2000000>;
    55			 *     no-map;
    56			 * };
    57			 */
    58	
    59			/* global autoconfigured region for contiguous allocations */
    60			linux,cma {
    61				compatible = "shared-dma-pool";
    62				reusable;
    63				size = <0 0x14000000>;
    64				alloc-ranges = <0 0x98000000 0 0x14000000>;
    65				linux,cma-default;
    66			};
    67	
    68			vdev0vring0: memory0@90000000 {
    69				reg = <0 0x90000000 0 0x8000>;
    70				no-map;
    71			};
    72	
    73			vdev0vring1: memory@90008000 {
    74				reg = <0 0x90008000 0 0x8000>;
    75				no-map;
    76			};
    77	
    78			vdev1vring0: memory@90010000 {
    79				reg = <0 0x90010000 0 0x8000>;
    80				no-map;
    81			};
    82	
    83			vdev1vring1: memory@90018000 {
    84				reg = <0 0x90018000 0 0x8000>;
    85				no-map;
    86			};
    87	
    88			rsc_table: memory-rsc-table@900ff000 {
    89				reg = <0 0x900ff000 0 0x1000>;
    90				no-map;
    91			};
    92	
  > 93			vdevbuffer: memory-vdevbuffer {
    94				compatible = "shared-dma-pool";
    95				reg = <0 0x90400000 0 0x100000>;
    96				no-map;
    97			};
    98		};
    99	
   100		m2_uart1_sel: regulator-m2uart1sel {
   101			compatible = "regulator-fixed";
   102			regulator-min-microvolt = <3300000>;
   103			regulator-max-microvolt = <3300000>;
   104			regulator-name = "m2_uart1_sel";
   105			gpio = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
   106			enable-active-high;
   107			regulator-always-on;
   108		};
   109	
   110		mux3_en: regulator-0 {
   111			compatible = "regulator-fixed";
   112			regulator-min-microvolt = <3300000>;
   113			regulator-max-microvolt = <3300000>;
   114			regulator-name = "mux3_en";
   115			gpio = <&pca6416_2 8 GPIO_ACTIVE_LOW>;
   116			regulator-always-on;
   117		};
   118	
   119		reg_fec1_sel: regulator-1 {
   120			compatible = "regulator-fixed";
   121			regulator-name = "fec1_supply";
   122			regulator-min-microvolt = <3300000>;
   123			regulator-max-microvolt = <3300000>;
   124			gpio = <&pca6416_1 11 GPIO_ACTIVE_LOW>;
   125			regulator-always-on;
   126			status = "disabled";
   127		};
   128	
   129		reg_fec1_io: regulator-2 {
   130			compatible = "regulator-fixed";
   131			regulator-name = "fec1_io_supply";
   132			regulator-min-microvolt = <1800000>;
   133			regulator-max-microvolt = <1800000>;
   134			gpio = <&max7322 0 GPIO_ACTIVE_HIGH>;
   135			enable-active-high;
   136			regulator-always-on;
   137			status = "disabled";
   138		};
   139	
   140		reg_can0_stby: regulator-4 {
   141			compatible = "regulator-fixed";
   142			regulator-name = "can0-stby";
   143			regulator-min-microvolt = <3300000>;
   144			regulator-max-microvolt = <3300000>;
   145			gpio = <&pca6416_3 0 GPIO_ACTIVE_HIGH>;
   146			enable-active-high;
   147		};
   148	
   149		reg_can1_stby: regulator-5 {
   150			compatible = "regulator-fixed";
   151			regulator-name = "can1-stby";
   152			regulator-min-microvolt = <3300000>;
   153			regulator-max-microvolt = <3300000>;
   154			gpio = <&pca6416_3 1 GPIO_ACTIVE_HIGH>;
   155			enable-active-high;
   156		};
   157	
   158		reg_usdhc2_vmmc: regulator-3 {
   159			compatible = "regulator-fixed";
   160			regulator-name = "SD1_SPWR";
   161			regulator-min-microvolt = <3000000>;
   162			regulator-max-microvolt = <3000000>;
   163			gpio = <&lsio_gpio4 30 GPIO_ACTIVE_HIGH>;
   164			enable-active-high;
   165			off-on-delay-us = <3480>;
   166		};
   167	
   168		reg_vref_1v8: regulator-adc-vref {
   169			compatible = "regulator-fixed";
   170			regulator-name = "vref_1v8";
   171			regulator-min-microvolt = <1800000>;
   172			regulator-max-microvolt = <1800000>;
   173		};
   174	
   175		mii_select: regulator-4 {
   176			compatible = "regulator-fixed";
   177			regulator-name = "mii-select";
   178			regulator-min-microvolt = <3300000>;
   179			regulator-max-microvolt = <3300000>;
   180			gpio = <&scu_gpio 6 GPIO_ACTIVE_HIGH>;
   181			enable-active-high;
   182			regulator-always-on;
   183		};
   184	
   185		bt_sco_codec: audio-codec-bt {
   186			compatible = "linux,bt-sco";
   187			#sound-dai-cells = <1>;
   188		};
   189	
   190		sound-bt-sco {
   191			compatible = "simple-audio-card";
   192			simple-audio-card,name = "bt-sco-audio";
   193			simple-audio-card,format = "dsp_a";
   194			simple-audio-card,bitclock-inversion;
   195			simple-audio-card,frame-master = <&btcpu>;
   196			simple-audio-card,bitclock-master = <&btcpu>;
   197	
   198			btcpu: simple-audio-card,cpu {
   199				sound-dai = <&sai0>;
   200				dai-tdm-slot-num = <2>;
   201				dai-tdm-slot-width = <16>;
   202			};
   203	
   204			simple-audio-card,codec {
   205				sound-dai = <&bt_sco_codec 1>;
   206			};
   207		};
   208	
   209		sound-wm8960-1 {
   210			compatible = "fsl,imx-audio-wm8960";
   211			model = "wm8960-audio";
   212			audio-cpu = <&sai1>;
   213			audio-codec = <&wm8960_1>;
   214			audio-asrc = <&asrc0>;
   215			audio-routing = "Headphone Jack", "HP_L",
   216					"Headphone Jack", "HP_R",
   217					"Ext Spk", "SPK_LP",
   218					"Ext Spk", "SPK_LN",
   219					"Ext Spk", "SPK_RP",
   220					"Ext Spk", "SPK_RN",
   221					"LINPUT1", "Mic Jack",
   222					"Mic Jack", "MICB";
   223		};
   224	
   225		sound-wm8960-2 {
   226			compatible = "fsl,imx-audio-wm8960";
   227			model = "wm8960-audio-2";
   228			audio-cpu = <&sai2>;
   229			audio-codec = <&wm8960_2>;
   230			audio-routing = "Headphone Jack", "HP_L",
   231					"Headphone Jack", "HP_R",
   232					"Ext Spk", "SPK_LP",
   233					"Ext Spk", "SPK_LN",
   234					"Ext Spk", "SPK_RP",
   235					"Ext Spk", "SPK_RN",
   236					"LINPUT1", "Mic Jack",
   237					"Mic Jack", "MICB";
   238		};
   239	
   240		sound-wm8960-3 {
   241			compatible = "fsl,imx-audio-wm8960";
   242			model = "wm8960-audio-3";
   243			audio-cpu = <&sai3>;
   244			audio-codec = <&wm8960_3>;
   245			audio-routing = "Headphone Jack", "HP_L",
   246					"Headphone Jack", "HP_R",
   247					"Ext Spk", "SPK_LP",
   248					"Ext Spk", "SPK_LN",
   249					"Ext Spk", "SPK_RP",
   250					"Ext Spk", "SPK_RN",
   251					"LINPUT1", "Mic Jack",
   252					"Mic Jack", "MICB";
   253		};
   254	};
   255
Shawn Guo June 17, 2024, 1:24 a.m. UTC | #5
On Wed, Jun 05, 2024 at 04:27:03PM -0400, Frank Li wrote:
> Add imx8dxl_cm4, lsio mu5 and related memory region.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> index 4ac96a0586294..c5e601b98cf8f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> @@ -24,6 +24,19 @@ chosen {
>  		stdout-path = &lpuart0;
>  	};
>  
> +	imx8dxl-cm4 {
> +		compatible = "fsl,imx8qxp-cm4";
> +		clocks = <&clk_dummy>;
> +		mbox-names = "tx", "rx", "rxdb";
> +		mboxes = <&lsio_mu5 0 1 &lsio_mu5 1 1 &lsio_mu5 3 1>;
> +		memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
> +				<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
> +		power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
> +		fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
> +		fsl,entry-address = <0x34fe0000>;
> +	};
> +
> +
>  	memory@80000000 {
>  		device_type = "memory";
>  		reg = <0x00000000 0x80000000 0 0x40000000>;
> @@ -51,6 +64,37 @@ linux,cma {
>  			alloc-ranges = <0 0x98000000 0 0x14000000>;
>  			linux,cma-default;
>  		};
> +
> +		vdev0vring0: memory0@90000000 {
> +			reg = <0 0x90000000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev0vring1: memory@90008000 {
> +			reg = <0 0x90008000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev1vring0: memory@90010000 {
> +			reg = <0 0x90010000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev1vring1: memory@90018000 {
> +			reg = <0 0x90018000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		rsc_table: memory-rsc-table@900ff000 {
> +			reg = <0 0x900ff000 0 0x1000>;
> +			no-map;
> +		};
> +
> +		vdevbuffer: memory-vdevbuffer {

As kernel test robot reported, unit-address is missing here?

Shawn

> +			compatible = "shared-dma-pool";
> +			reg = <0 0x90400000 0 0x100000>;
> +			no-map;
> +		};
>  	};
>  
>  	m2_uart1_sel: regulator-m2uart1sel {
> @@ -505,6 +549,10 @@ &lpuart1 {
>  	status = "okay";
>  };
>  
> +&lsio_mu5 {
> +	status = "okay";
> +};
> +
>  &flexcan2 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_flexcan2>;
> -- 
> 2.34.1
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 4ac96a0586294..c5e601b98cf8f 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -24,6 +24,19 @@  chosen {
 		stdout-path = &lpuart0;
 	};
 
+	imx8dxl-cm4 {
+		compatible = "fsl,imx8qxp-cm4";
+		clocks = <&clk_dummy>;
+		mbox-names = "tx", "rx", "rxdb";
+		mboxes = <&lsio_mu5 0 1 &lsio_mu5 1 1 &lsio_mu5 3 1>;
+		memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+				<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
+		power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
+		fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
+		fsl,entry-address = <0x34fe0000>;
+	};
+
+
 	memory@80000000 {
 		device_type = "memory";
 		reg = <0x00000000 0x80000000 0 0x40000000>;
@@ -51,6 +64,37 @@  linux,cma {
 			alloc-ranges = <0 0x98000000 0 0x14000000>;
 			linux,cma-default;
 		};
+
+		vdev0vring0: memory0@90000000 {
+			reg = <0 0x90000000 0 0x8000>;
+			no-map;
+		};
+
+		vdev0vring1: memory@90008000 {
+			reg = <0 0x90008000 0 0x8000>;
+			no-map;
+		};
+
+		vdev1vring0: memory@90010000 {
+			reg = <0 0x90010000 0 0x8000>;
+			no-map;
+		};
+
+		vdev1vring1: memory@90018000 {
+			reg = <0 0x90018000 0 0x8000>;
+			no-map;
+		};
+
+		rsc_table: memory-rsc-table@900ff000 {
+			reg = <0 0x900ff000 0 0x1000>;
+			no-map;
+		};
+
+		vdevbuffer: memory-vdevbuffer {
+			compatible = "shared-dma-pool";
+			reg = <0 0x90400000 0 0x100000>;
+			no-map;
+		};
 	};
 
 	m2_uart1_sel: regulator-m2uart1sel {
@@ -505,6 +549,10 @@  &lpuart1 {
 	status = "okay";
 };
 
+&lsio_mu5 {
+	status = "okay";
+};
+
 &flexcan2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_flexcan2>;