| Message ID | 20240606161047.663833-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells | expand |
On Thu, Jun 6, 2024 at 6:11 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > For the RZ/G2L and similar SoCs, the reset specifier is the reset number > and not the module number. Reflect this in the description for the > '#reset-cells' property. > > Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-clk for v6.11. Gr{oetje,eeting}s, Geert
On Thu, 06 Jun 2024 17:10:47 +0100, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > For the RZ/G2L and similar SoCs, the reset specifier is the reset number > and not the module number. Reflect this in the description for the > '#reset-cells' property. > > Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Acked-by: Rob Herring (Arm) <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml index 4e3b0c45124a..0440f23da059 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml @@ -62,7 +62,7 @@ properties: '#reset-cells': description: - The single reset specifier cell must be the module number, as defined in + The single reset specifier cell must be the reset number, as defined in <dt-bindings/clock/r9a0*-cpg.h>. const: 1