| Message ID | 20240606085234.565551-3-ms@dev.tdt.de (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: dsa: lantiq_gswip: code improvements | expand |
On Thu, Jun 06, 2024 at 10:52:23AM +0200, Martin Schiller wrote: > From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > > Add the CPU port to gswip_xrx200_phylink_get_caps() and > gswip_xrx300_phylink_get_caps(). It connects through a SoC-internal bus, > so the only allowed phy-mode is PHY_INTERFACE_MODE_INTERNAL. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- This is for the case where those CPU port device tree properties are present, right? In the device trees in current circulation they are not, and DSA skips phylink registration.
On 2024-06-07 13:03, Vladimir Oltean wrote: > On Thu, Jun 06, 2024 at 10:52:23AM +0200, Martin Schiller wrote: >> From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> >> >> Add the CPU port to gswip_xrx200_phylink_get_caps() and >> gswip_xrx300_phylink_get_caps(). It connects through a SoC-internal >> bus, >> so the only allowed phy-mode is PHY_INTERFACE_MODE_INTERNAL. >> >> Signed-off-by: Martin Blumenstingl >> <martin.blumenstingl@googlemail.com> >> --- > > This is for the case where those CPU port device tree properties are > present, right? In the device trees in current circulation they are > not, > and DSA skips phylink registration. Yes, as far as I know, this driver is mainly, if not exclusively, used in the openWrt environment. These functions were already added here in Oct. 2022 [1]. [1] https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=2683cca5927844594f7835aa983e2690d1e343c6
On Fri, Jun 07, 2024 at 02:01:57PM +0200, Martin Schiller wrote: > On 2024-06-07 13:03, Vladimir Oltean wrote: > > On Thu, Jun 06, 2024 at 10:52:23AM +0200, Martin Schiller wrote: > > > From: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > > > > > > Add the CPU port to gswip_xrx200_phylink_get_caps() and > > > gswip_xrx300_phylink_get_caps(). It connects through a SoC-internal > > > bus, > > > so the only allowed phy-mode is PHY_INTERFACE_MODE_INTERNAL. > > > > > > Signed-off-by: Martin Blumenstingl > > > <martin.blumenstingl@googlemail.com> > > > --- > > > > This is for the case where those CPU port device tree properties are > > present, right? In the device trees in current circulation they are not, > > and DSA skips phylink registration. > > Yes, as far as I know, this driver is mainly, if not exclusively, used in > the > openWrt environment. These functions were already added here in Oct. 2022 > [1]. > > [1] https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=2683cca5927844594f7835aa983e2690d1e343c6 Ok. You can add my Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c index a557049e34f5..b9c7076ce32f 100644 --- a/drivers/net/dsa/lantiq_gswip.c +++ b/drivers/net/dsa/lantiq_gswip.c @@ -1516,6 +1516,7 @@ static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port, case 2: case 3: case 4: + case 6: __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); break; @@ -1547,6 +1548,7 @@ static void gswip_xrx300_phylink_get_caps(struct dsa_switch *ds, int port, case 2: case 3: case 4: + case 6: __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); break;