mbox series

[6.1.y-cip,00/17] Add suspend to RAM support for pin and IA55 IRQ controllers

Message ID 20240607140856.2497508-1-claudiu.beznea.uj@bp.renesas.com (mailing list archive)
Headers show
Series Add suspend to RAM support for pin and IA55 IRQ controllers | expand

Message

Claudiu Beznea June 7, 2024, 2:08 p.m. UTC
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>

Hi,

Series adds suspend to RAM support for pin and IA55 IRQ controller.
Support is needed for RZ/G3S SoC.

Along with it pin controller and IA55 interrupt controller drivers
were updated with enhancements.

Series is split as follows:
- patch 01:      add clock and reset support for IA55 IRQ controller on
                 RZ/G3S
- patches 02-08: update the pin controller driver with fixes for spurious
                 interrupts when pin controller interrupt lines are routed
                 to IA55 IRQ controller
- patch 09:      add suspend to RAM support for pinctrl driver
- patch 10:      select proper flags for pinctrl driver
- patch 11:      add suspend to RAM support for IA55 IRQ controler
- patches 12-13: documentation patches
- patches 14-17: update the device tree with IA55, gpio keys, PSCI
                 support

Thank you,
Claudiu Beznea

Biju Das (3):
  pinctrl: renesas: rzg2l: Configure interrupt input mode
  pinctrl: renesas: rzg2l: Simplify rzg2l_gpio_irq_{en,dis}able()
  pinctrl: renesas: rzg2l: Avoid configuring ISEL in
    gpio_irq_{en,dis}able*(

Claudiu Beznea (8):
  clk: renesas: r9a08g045: Add IA55 pclk and its reset
  pinctrl: renesas: rzg2l: Add suspend/resume support
  pinctrl: renesas: rzg2l: Select GPIOLIB_IRQCHIP and
    IRQ_DOMAIN_HIERARCHY
  irqchip/renesas-rzg2l: Add support for suspend to RAM
  dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3S
  arm64: dts: renesas: r9a08g045: Add IA55 interrupt controller node
  arm64: dts: renesas: r9a08g045: Add PSCI support
  arm64: dts: renesas: rzg3s-smarc: Add gpio keys

Johannes Berg (1):
  bitfield: add FIELD_PREP_CONST()

Lad Prabhakar (5):
  pinctrl: renesas: rzg2l: Improve code for readability
  pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK()
    macro
  pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
  dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document
    RZ/G2UL SoC
  arm64: dts: renesas: r9a08g045: Add missing interrupts to IRQC node

 .../renesas,rzg2l-irqc.yaml                   | 228 ++++--
 arch/arm64/boot/dts/renesas/r9a08g045.dtsi    |  77 ++
 arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi  |  53 ++
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi   |   4 +
 drivers/clk/renesas/r9a08g045-cpg.c           |   3 +
 drivers/irqchip/irq-renesas-rzg2l.c           |  68 +-
 drivers/pinctrl/renesas/Kconfig               |   2 +
 drivers/pinctrl/renesas/pinctrl-rzg2l.c       | 770 ++++++++++++++++--
 include/linux/bitfield.h                      |  26 +
 9 files changed, 1093 insertions(+), 138 deletions(-)

Comments

Pavel Machek June 10, 2024, 9:21 p.m. UTC | #1
Hi!

> Series adds suspend to RAM support for pin and IA55 IRQ controller.
> Support is needed for RZ/G3S SoC.
> 
> Along with it pin controller and IA55 interrupt controller drivers
> were updated with enhancements.
> 
> Series is split as follows:
> - patch 01:      add clock and reset support for IA55 IRQ controller on
>                  RZ/G3S
> - patches 02-08: update the pin controller driver with fixes for spurious
>                  interrupts when pin controller interrupt lines are routed
>                  to IA55 IRQ controller
> - patch 09:      add suspend to RAM support for pinctrl driver

I went through the patches, and while 09 looks "interesting", I don't
see any functionality problem and its nothing we should change in
-cip.

So, I can apply the series if I get no other comments and if it passes
testing.

Best regards,
								Pavel
Pavel Machek June 11, 2024, 11:56 a.m. UTC | #2
Hi1

> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> 
> Hi,
> 
> Series adds suspend to RAM support for pin and IA55 IRQ controller.
> Support is needed for RZ/G3S SoC.
> 
> Along with it pin controller and IA55 interrupt controller drivers
> were updated with enhancements.
> 
> Series is split as follows:
> - patch 01:      add clock and reset support for IA55 IRQ controller on
>                  RZ/G3S
> - patches 02-08: update the pin controller driver with fixes for spurious
>                  interrupts when pin controller interrupt lines are routed
>                  to IA55 IRQ controller
> - patch 09:      add suspend to RAM support for pinctrl driver
> - patch 10:      select proper flags for pinctrl driver
> - patch 11:      add suspend to RAM support for IA55 IRQ controler
> - patches 12-13: documentation patches
> - patches 14-17: update the device tree with IA55, gpio keys, PSCI
>                  support
> 
> Thank you,

Thank you, applied.

Best regards,
								Pavel