| Message ID | 20240610-xtheadvector-v2-11-97a48613ad64@rivosinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | riscv: Add support for xtheadvector | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/vmtest-fixes-PR | fail | merge-conflict |
On Mon, Jun 10, 2024 at 3:57 PM Charlie Jenkins <charlie@rivosinc.com> wrote: > > Document support for thead vendor extensions using the key > RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0 and xtheadvector extension using > the key RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR. > > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> > Reviewed-by: Evan Green <evan@rivosinc.com> > --- > Documentation/arch/riscv/hwprobe.rst | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst > index 204cd4433af5..9c0ef8c57228 100644 > --- a/Documentation/arch/riscv/hwprobe.rst > +++ b/Documentation/arch/riscv/hwprobe.rst > @@ -214,3 +214,13 @@ The following keys are defined: > > * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which > represents the size of the Zicboz block in bytes. > + > +* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0`: A bitmask containing the Our recent snafoo with CPUPERF_0 popped into my memory when reading this. Does this work properly with the WHICH_CPUS flag? Specifically, we need hwprobe_key_is_bitmask() to return true for this key since it's a bitmask.
On Tue, Jun 11, 2024 at 08:58:37AM -0700, Evan Green wrote: > On Mon, Jun 10, 2024 at 3:57 PM Charlie Jenkins <charlie@rivosinc.com> wrote: > > > > Document support for thead vendor extensions using the key > > RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0 and xtheadvector extension using > > the key RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR. > > > > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> > > Reviewed-by: Evan Green <evan@rivosinc.com> > > --- > > Documentation/arch/riscv/hwprobe.rst | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst > > index 204cd4433af5..9c0ef8c57228 100644 > > --- a/Documentation/arch/riscv/hwprobe.rst > > +++ b/Documentation/arch/riscv/hwprobe.rst > > @@ -214,3 +214,13 @@ The following keys are defined: > > > > * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which > > represents the size of the Zicboz block in bytes. > > + > > +* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0`: A bitmask containing the > > Our recent snafoo with CPUPERF_0 popped into my memory > when reading this. Does this work properly with the WHICH_CPUS flag? > Specifically, we need hwprobe_key_is_bitmask() to return true for this > key since it's a bitmask. Hmm yes I need to add that. Thank you. - Charlie
diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 204cd4433af5..9c0ef8c57228 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -214,3 +214,13 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which represents the size of the Zicboz block in bytes. + +* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0`: A bitmask containing the + thead vendor extensions that are compatible with the + :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. + + * T-HEAD + + * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR`: The xtheadvector vendor + extension is supported in the T-Head ISA extensions spec starting from + commit a18c801634 ("Add T-Head VECTOR vendor extension. ").