| Message ID | 20220826192932.3217260-4-l.stach@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] arm64: dts: imx8mp: add HDMI power-domains | expand |
Hello Lucas, On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach <l.stach@pengutronix.de> wrote: > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > involved pins that are configurable. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> I'm joining late to this party... Is this the latest version of this series? I haven't found any more recent, but if it is not the case would you point me to the most recent one please? > + pinctrl_hdmi: hdmigrp { > + fsl,pins = < > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 Is the low nibble (0x3) right?BIT(0) is reserved according too the reference manual. Also, all the non-reserved bits in that nibble are bits 1 and 2, which set the drive strength. For an I2C line it seems that the minimum drive strength (0x0) should be enough for an I2C line: with any drive strength setting the supported frequency is >= 65 MHz. > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 Here as well, bits 0 and 3 are reserved. Best regards, Luca
Hello Lucas, On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli <luca.ceresoli@bootlin.com> wrote: > Hello Lucas, > > On Fri, 26 Aug 2022 21:29:32 +0200 > Lucas Stach <l.stach@pengutronix.de> wrote: > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > involved pins that are configurable. > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Any updates to these patches? I haven't found any v2 on the list. > I'm joining late to this party... Is this the latest version of this > series? I haven't found any more recent, but if it is not the case > would you point me to the most recent one please? > > > + pinctrl_hdmi: hdmigrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 > > Is the low nibble (0x3) right?BIT(0) is reserved according too the > reference manual. > > Also, all the non-reserved bits in that nibble are bits 1 and 2, which > set the drive strength. For an I2C line it seems that the minimum drive > strength (0x0) should be enough for an I2C line: with any drive > strength setting the supported frequency is >= 65 MHz. > > > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 > > Here as well, bits 0 and 3 are reserved. About these pinctrls, I am using these settings on the MSC SM2-MB-EP1 board and they appear to be working just as those you are using (but I haven't tested CEC): MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2 MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2 MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10 MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x10 Best regards, Luca
On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > involved pins that are configurable. > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > Any updates to these patches? I haven't found any v2 on the list. This is the last patch in the series that hasn't made it upstream It would be really nice to get a new version that could be merged in v6.11. Pretty please :-) > > I'm joining late to this party... Is this the latest version of this > > series? I haven't found any more recent, but if it is not the case > > would you point me to the most recent one please? > > > > > + pinctrl_hdmi: hdmigrp { > > > + fsl,pins = < > > > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > > > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 > > > > Is the low nibble (0x3) right?BIT(0) is reserved according too the > > reference manual. > > > > Also, all the non-reserved bits in that nibble are bits 1 and 2, which > > set the drive strength. For an I2C line it seems that the minimum drive > > strength (0x0) should be enough for an I2C line: with any drive > > strength setting the supported frequency is >= 65 MHz. > > > > > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > > > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 > > > > Here as well, bits 0 and 3 are reserved. > > About these pinctrls, I am using these settings on the MSC SM2-MB-EP1 > board and they appear to be working just as those you are using (but I > haven't tested CEC): > > MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2 > MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2 > MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10 > MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x10
Hi Laurent, On Sat, 8 Jun 2024 18:06:13 +0300 Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > > involved pins that are configurable. > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > Any updates to these patches? I haven't found any v2 on the list. > > This is the last patch in the series that hasn't made it upstream It > would be really nice to get a new version that could be merged in v6.11. > Pretty please :-) It will be my pleasure to rebase, test and resend this week! :) Luca
Hi again Laurent, On Mon, 10 Jun 2024 10:31:36 +0200 Luca Ceresoli <luca.ceresoli@bootlin.com> wrote: > Hi Laurent, > > On Sat, 8 Jun 2024 18:06:13 +0300 > Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > > > On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > > > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > > > involved pins that are configurable. > > > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > > > Any updates to these patches? I haven't found any v2 on the list. > > > > This is the last patch in the series that hasn't made it upstream It > > would be really nice to get a new version that could be merged in v6.11. > > Pretty please :-) > > It will be my pleasure to rebase, test and resend this week! :) Oops, I clearly had misread your e-mail! :) You was of course referring to Lucas' patch for the imx8mp-evk and not mine for the imx8mp-msc-sm2s, which I thought I had sent previously. It must have been the similarity between 'Luca' and 'Lucas' along with the 'To:' header, the board names being somewhat similar and the actual patch content being almost identical... But turns out I hadn't sent that patch yet. Sent it right now: https://lore.kernel.org/linux-devicetree/20240612-imx8mp-msc-sm2s-hdmi-v1-1-6c808df5205d@bootlin.com/T/#u Luca
On Wed, Jun 12, 2024 at 12:25:02PM +0200, Luca Ceresoli wrote: > On Mon, 10 Jun 2024 10:31:36 +0200 Luca Ceresoli wrote: > > On Sat, 8 Jun 2024 18:06:13 +0300 Laurent Pinchart wrote: > > > On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > > > > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > > > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > > > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > > > > involved pins that are configurable. > > > > > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > > > > > Any updates to these patches? I haven't found any v2 on the list. > > > > > > This is the last patch in the series that hasn't made it upstream It > > > would be really nice to get a new version that could be merged in v6.11. > > > Pretty please :-) > > > > It will be my pleasure to rebase, test and resend this week! :) > > Oops, I clearly had misread your e-mail! :) > > You was of course referring to Lucas' patch for the imx8mp-evk and not > mine for the imx8mp-msc-sm2s, which I thought I had sent previously. That's right, I was referring to the EVK patch. Luca*s*, would you consider resubmitting it in time for v6.11 ? > It must have been the similarity between 'Luca' and 'Lucas' along with > the 'To:' header, the board names being somewhat similar and the actual > patch content being almost identical... So which of you will change his name ? :-) > But turns out I hadn't sent that patch yet. Sent it right now: > https://lore.kernel.org/linux-devicetree/20240612-imx8mp-msc-sm2s-hdmi-v1-1-6c808df5205d@bootlin.com/T/#u
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index f6b017ab5f53..f3180c90709e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -213,6 +213,20 @@ &flexcan2 { status = "disabled";/* can2 pin conflict with pdm */ }; +&hdmi_pvi { + status = "okay"; +}; + +&hdmi_tx { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; + status = "okay"; +}; + +&hdmi_tx_phy { + status = "okay"; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -350,6 +364,10 @@ &i2c5 { */ }; +&lcdif3 { + status = "okay"; +}; + &snvs_pwrkey { status = "okay"; }; @@ -481,6 +499,15 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 >; }; + pinctrl_hdmi: hdmigrp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few involved pins that are configurable. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 27 ++++++++++++++++++++ 1 file changed, 27 insertions(+)