| Message ID | 20240610233221.242749-3-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add CPG support for RZ/V2H(P) SoC | expand |
On 11/06/2024 01:32, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Define RZ/V2H(P) (R9A09G057) Clock Pulse Generator core clocks. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v1->v2 > - Dropped the module clocks and just added the core clocks > > Note the core clocks are the once which are listed as part > of section 4.4.2 which cannot be controlled by CLKON register. > --- > include/dt-bindings/clock/r9a09g057-cpg.h | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > create mode 100644 include/dt-bindings/clock/r9a09g057-cpg.h Missing vendor prefix. This belongs to the binding patch, so squash it. Best regards, Krzysztof
Hi Krzysztof, Thank you for the review. On Tue, Jun 11, 2024 at 7:59 AM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 11/06/2024 01:32, Prabhakar wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > Define RZ/V2H(P) (R9A09G057) Clock Pulse Generator core clocks. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > --- > > v1->v2 > > - Dropped the module clocks and just added the core clocks > > > > Note the core clocks are the once which are listed as part > > of section 4.4.2 which cannot be controlled by CLKON register. > > --- > > include/dt-bindings/clock/r9a09g057-cpg.h | 21 +++++++++++++++++++++ > > 1 file changed, 21 insertions(+) > > create mode 100644 include/dt-bindings/clock/r9a09g057-cpg.h > > Missing vendor prefix. > OK, Is this just for new includes being added, or do you want me to rename the existing Renesas specific includes in here which dont have vendor prefix? > This belongs to the binding patch, so squash it. > OK, I will squash it. Cheers, Prabhakar
On 13/06/2024 11:57, Lad, Prabhakar wrote: >>> of section 4.4.2 which cannot be controlled by CLKON register. >>> --- >>> include/dt-bindings/clock/r9a09g057-cpg.h | 21 +++++++++++++++++++++ >>> 1 file changed, 21 insertions(+) >>> create mode 100644 include/dt-bindings/clock/r9a09g057-cpg.h >> >> Missing vendor prefix. >> > OK, Is this just for new includes being added, or do you want me to > rename the existing Renesas specific includes in here which dont have > vendor prefix? Didn't we discuss it? I commented only about this binding. Best regards, Krzysztof
Hi Krzysztof, On Thu, Jun 13, 2024 at 2:56 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > On 13/06/2024 11:57, Lad, Prabhakar wrote: > >>> of section 4.4.2 which cannot be controlled by CLKON register. > >>> --- > >>> include/dt-bindings/clock/r9a09g057-cpg.h | 21 +++++++++++++++++++++ > >>> 1 file changed, 21 insertions(+) > >>> create mode 100644 include/dt-bindings/clock/r9a09g057-cpg.h > >> > >> Missing vendor prefix. > >> > > OK, Is this just for new includes being added, or do you want me to > > rename the existing Renesas specific includes in here which dont have > > vendor prefix? > > Didn't we discuss it? > > I commented only about this binding. Yes we did, in the context of the R-Car V4M DT binding definitions, which became include/dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h But Prabhakar was not involved there. Note that I also asked to include the vendor prefix, see https://lore.kernel.org/linux-renesas-soc/CAMuHMdU7+O-+v=2V83AjQmTWyGy_a-AHgU_nPMDHnVUtYt89iQ@mail.gmail.com/ Gr{oetje,eeting}s, Geert
Hi Geert, On Thu, Jun 13, 2024 at 4:15 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Krzysztof, > > On Thu, Jun 13, 2024 at 2:56 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 13/06/2024 11:57, Lad, Prabhakar wrote: > > >>> of section 4.4.2 which cannot be controlled by CLKON register. > > >>> --- > > >>> include/dt-bindings/clock/r9a09g057-cpg.h | 21 +++++++++++++++++++++ > > >>> 1 file changed, 21 insertions(+) > > >>> create mode 100644 include/dt-bindings/clock/r9a09g057-cpg.h > > >> > > >> Missing vendor prefix. > > >> > > > OK, Is this just for new includes being added, or do you want me to > > > rename the existing Renesas specific includes in here which dont have > > > vendor prefix? > > > > Didn't we discuss it? > > > > I commented only about this binding. > > Yes we did, in the context of the R-Car V4M DT binding definitions, > which became include/dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h > But Prabhakar was not involved there. > > Note that I also asked to include the vendor prefix, see > https://lore.kernel.org/linux-renesas-soc/CAMuHMdU7+O-+v=2V83AjQmTWyGy_a-AHgU_nPMDHnVUtYt89iQ@mail.gmail.com/ > Oops I missed that review comment. Cheers, Prabhakar
On Tue, Jun 11, 2024 at 1:32 AM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Define RZ/V2H(P) (R9A09G057) Clock Pulse Generator core clocks. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v1->v2 > - Dropped the module clocks and just added the core clocks > > Note the core clocks are the once which are listed as part s/the once/a subset of the ones/ > of section 4.4.2 which cannot be controlled by CLKON register. and we can add more when needed ("append only"). > +++ b/include/dt-bindings/clock/r9a09g057-cpg.h With the "renesas," prefix added: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
diff --git a/include/dt-bindings/clock/r9a09g057-cpg.h b/include/dt-bindings/clock/r9a09g057-cpg.h new file mode 100644 index 000000000000..04653d90d78d --- /dev/null +++ b/include/dt-bindings/clock/r9a09g057-cpg.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * Copyright (C) 2024 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_CLOCK_R9A09G057_CPG_H__ +#define __DT_BINDINGS_CLOCK_R9A09G057_CPG_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* Core Clock list */ +#define R9A09G057_SYS_0_PCLK 0 +#define R9A09G057_CA55_0_CORE_CLK0 1 +#define R9A09G057_CA55_0_CORE_CLK1 2 +#define R9A09G057_CA55_0_CORE_CLK2 3 +#define R9A09G057_CA55_0_CORE_CLK3 4 +#define R9A09G057_CA55_0_PERIPHCLK 5 +#define R9A09G057_CM33_CLK0 6 +#define R9A09G057_CST_0_SWCLKTCK 7 +#define R9A09G057_IOTOP_0_SHCLK 8 + +#endif /* __DT_BINDINGS_CLOCK_R9A09G057_CPG_H__ */