diff mbox series

[v3] drm/i915/display: update handling of FBC when VT-d active workaround

Message ID 20240528114826.134958-1-vinod.govindapillai@intel.com (mailing list archive)
State New, archived
Headers show
Series [v3] drm/i915/display: update handling of FBC when VT-d active workaround | expand

Commit Message

Vinod Govindapillai May 28, 2024, 11:48 a.m. UTC
Move the handling of the disabling FBC when VT-d is active wa
as part of the intel_fbc_check_plane(). As the hw is still there,
intel_fbc_sanitize should be able to handle the state properly.

v2: update the patch description (Jani Nikula)

v3: fix the return value in wa handling (Jani Nikula)

Bspec: 21664
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 22 ++++++----------------
 1 file changed, 6 insertions(+), 16 deletions(-)

Comments

Hogander, Jouni June 14, 2024, 7:01 a.m. UTC | #1
On Tue, 2024-05-28 at 14:48 +0300, Vinod Govindapillai wrote:
> Move the handling of the disabling FBC when VT-d is active wa
> as part of the intel_fbc_check_plane(). As the hw is still there,
> intel_fbc_sanitize should be able to handle the state properly.
> 
> v2: update the patch description (Jani Nikula)
> 
> v3: fix the return value in wa handling (Jani Nikula)
> 
> Bspec: 21664
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 22 ++++++----------------
>  1 file changed, 6 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index e9189a864f69..b546ebc6823d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1235,6 +1235,12 @@ static int intel_fbc_check_plane(struct
> intel_atomic_state *state,
>                 return 0;
>         }
>  
> +       /* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl,bxt */
> +       if (i915_vtd_active(i915) && (IS_SKYLAKE(i915) ||
> IS_BROXTON(i915))) {
> +               plane_state->no_fbc_reason = "VT-d enabled";
> +               return 0;
> +       }
> +
>         crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
>  
>         if (crtc_state->hw.adjusted_mode.flags &
> DRM_MODE_FLAG_INTERLACE) {
> @@ -1820,19 +1826,6 @@ static int intel_sanitize_fbc_option(struct
> drm_i915_private *i915)
>         return 0;
>  }
>  
> -static bool need_fbc_vtd_wa(struct drm_i915_private *i915)
> -{
> -       /* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl,bxt */
> -       if (i915_vtd_active(i915) &&
> -           (IS_SKYLAKE(i915) || IS_BROXTON(i915))) {
> -               drm_info(&i915->drm,
> -                        "Disabling framebuffer compression (FBC) to
> prevent screen flicker with VT-d enabled\n");
> -               return true;
> -       }
> -
> -       return false;
> -}
> -
>  void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane
> *plane)
>  {
>         plane->fbc = fbc;
> @@ -1878,9 +1871,6 @@ void intel_fbc_init(struct drm_i915_private
> *i915)
>  {
>         enum intel_fbc_id fbc_id;
>  
> -       if (need_fbc_vtd_wa(i915))
> -               DISPLAY_RUNTIME_INFO(i915)->fbc_mask = 0;
> -
>         i915->display.params.enable_fbc =
> intel_sanitize_fbc_option(i915);
>         drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n",
>                     i915->display.params.enable_fbc);
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index e9189a864f69..b546ebc6823d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1235,6 +1235,12 @@  static int intel_fbc_check_plane(struct intel_atomic_state *state,
 		return 0;
 	}
 
+	/* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl,bxt */
+	if (i915_vtd_active(i915) && (IS_SKYLAKE(i915) || IS_BROXTON(i915))) {
+		plane_state->no_fbc_reason = "VT-d enabled";
+		return 0;
+	}
+
 	crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 
 	if (crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) {
@@ -1820,19 +1826,6 @@  static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
 	return 0;
 }
 
-static bool need_fbc_vtd_wa(struct drm_i915_private *i915)
-{
-	/* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl,bxt */
-	if (i915_vtd_active(i915) &&
-	    (IS_SKYLAKE(i915) || IS_BROXTON(i915))) {
-		drm_info(&i915->drm,
-			 "Disabling framebuffer compression (FBC) to prevent screen flicker with VT-d enabled\n");
-		return true;
-	}
-
-	return false;
-}
-
 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)
 {
 	plane->fbc = fbc;
@@ -1878,9 +1871,6 @@  void intel_fbc_init(struct drm_i915_private *i915)
 {
 	enum intel_fbc_id fbc_id;
 
-	if (need_fbc_vtd_wa(i915))
-		DISPLAY_RUNTIME_INFO(i915)->fbc_mask = 0;
-
 	i915->display.params.enable_fbc = intel_sanitize_fbc_option(i915);
 	drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n",
 		    i915->display.params.enable_fbc);