diff mbox series

[v8,06/20] drm/i915/psr: Disable PSR2 SU Region Early Transport if psr_enable is set

Message ID 20240613093239.1293629-7-jouni.hogander@intel.com (mailing list archive)
State New, archived
Headers show
Series Panel Replay eDP support | expand

Commit Message

Hogander, Jouni June 13, 2024, 9:32 a.m. UTC
Currently PSR2 SU Region Early Transport is enabled by default on Lunarlake
if panel supports it despite psr_enable value. Prevent SU Region Early
Transport if psr_enable is set to than -1 which is the default.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

Comments

Manna, Animesh June 14, 2024, 4:55 p.m. UTC | #1
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, June 13, 2024 3:02 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> Subject: [PATCH v8 06/20] drm/i915/psr: Disable PSR2 SU Region Early
> Transport if psr_enable is set
> 
> Currently PSR2 SU Region Early Transport is enabled by default on Lunarlake
> if panel supports it despite psr_enable value. Prevent SU Region Early
> Transport if psr_enable is set to than -1 which is the default.
> 
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 0df557676e08..27cf330d13e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -235,6 +235,16 @@ static bool psr2_global_enabled(struct intel_dp
> *intel_dp)
>  	}
>  }
> 
> +static bool psr2_su_region_et_global_enabled(struct intel_dp *intel_dp)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +
> +	if (i915->display.params.enable_psr != -1)
> +		return false;
> +
> +	return true;
> +}
> +
>  static bool panel_replay_global_enabled(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -683,7
> +693,8 @@ static bool psr2_su_region_et_valid(struct intel_dp *intel_dp,
> bool panel_replay
> 
>  	return panel_replay ?
>  		intel_dp->pr_dpcd &
> DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT :
> -		intel_dp->psr_dpcd[0] ==
> DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
> +		intel_dp->psr_dpcd[0] ==
> DP_PSR2_WITH_Y_COORD_ET_SUPPORTED &&
> +		psr2_su_region_et_global_enabled(intel_dp);

How to enable early transport with psr/psr2? Is it not possible now/future?

Regards,
Animesh

>  }
> 
>  static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
> --
> 2.34.1
Hogander, Jouni June 14, 2024, 8:41 p.m. UTC | #2
On Fri, 2024-06-14 at 16:55 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Thursday, June 13, 2024 3:02 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>; Kahola, Mika
> > <mika.kahola@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>
> > Subject: [PATCH v8 06/20] drm/i915/psr: Disable PSR2 SU Region
> > Early
> > Transport if psr_enable is set
> > 
> > Currently PSR2 SU Region Early Transport is enabled by default on
> > Lunarlake
> > if panel supports it despite psr_enable value. Prevent SU Region
> > Early
> > Transport if psr_enable is set to than -1 which is the default.
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 13 ++++++++++++-
> >  1 file changed, 12 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 0df557676e08..27cf330d13e2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -235,6 +235,16 @@ static bool psr2_global_enabled(struct
> > intel_dp
> > *intel_dp)
> >         }
> >  }
> > 
> > +static bool psr2_su_region_et_global_enabled(struct intel_dp
> > *intel_dp)
> > +{
> > +       struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> > +
> > +       if (i915->display.params.enable_psr != -1)
> > +               return false;
> > +
> > +       return true;
> > +}
> > +
> >  static bool panel_replay_global_enabled(struct intel_dp
> > *intel_dp)  {
> >         struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -
> > 683,7
> > +693,8 @@ static bool psr2_su_region_et_valid(struct intel_dp
> > *intel_dp,
> > bool panel_replay
> > 
> >         return panel_replay ?
> >                 intel_dp->pr_dpcd &
> > DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT :
> > -               intel_dp->psr_dpcd[0] ==
> > DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
> > +               intel_dp->psr_dpcd[0] ==
> > DP_PSR2_WITH_Y_COORD_ET_SUPPORTED &&
> > +               psr2_su_region_et_global_enabled(intel_dp);
> 
> How to enable early transport with psr/psr2? Is it not possible
> now/future?

It gets enabled if panel supports it. Unless disable bit is set
(I915_PSR_DEBUG_SU_REGION_ET_DISABLE) or enable_psr module parameter is
set.

BR,

Jouni Högander

> 
> Regards,
> Animesh
> 
> >  }
> > 
> >  static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
> > --
> > 2.34.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 0df557676e08..27cf330d13e2 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -235,6 +235,16 @@  static bool psr2_global_enabled(struct intel_dp *intel_dp)
 	}
 }
 
+static bool psr2_su_region_et_global_enabled(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+	if (i915->display.params.enable_psr != -1)
+		return false;
+
+	return true;
+}
+
 static bool panel_replay_global_enabled(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
@@ -683,7 +693,8 @@  static bool psr2_su_region_et_valid(struct intel_dp *intel_dp, bool panel_replay
 
 	return panel_replay ?
 		intel_dp->pr_dpcd & DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT :
-		intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
+		intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED &&
+		psr2_su_region_et_global_enabled(intel_dp);
 }
 
 static void _panel_replay_enable_sink(struct intel_dp *intel_dp,