| Message ID | 4416ff72ea5a33173b69561803f1578073baccae.1718606975.git.perry.yuan@amd.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | AMD Pstate Driver Fixes and Improvements | expand |
On Mon, Jun 17, 2024 at 02:59:10PM +0800, Perry Yuan wrote: > CPUID leaf 0x80000026 advertises core types with different efficiency rankings > > Bit 30 indicates the heterogeneous core topology feature, if the bit > set, it means not all instances at the current hierarchical level have > the same core topology. > > For better utilization of feature words and help to identify core type, > X86_FEATURE_HETERO_CORE_TOPOLOGY is added as a few scattered feature bits. > > Reference: > See the page 119 of PPR for AMD Family 19h Model 61h B1, docID 56713 > > Signed-off-by: Perry Yuan <perry.yuan@amd.com> > --- > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/kernel/cpu/scattered.c | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 6c128d463a14..eceaa0df0137 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -471,6 +471,7 @@ > #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control enabled */ > #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */ > #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* "" AMD Fast CPPC */ > +#define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32+ 6) /* "" Heterogeneous Core Topology */ > > /* > * BUG word(s) > diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c > index c84c30188fdf..6b3477503dd0 100644 > --- a/arch/x86/kernel/cpu/scattered.c > +++ b/arch/x86/kernel/cpu/scattered.c > @@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = { > { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, > { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, > { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 }, > + { X86_FEATURE_HETERO_CORE_TOPOLOGY, CPUID_EAX, 30, 0x80000026, 0 }, > { 0, 0, 0, 0, 0 } > }; > > -- Nacked-by: Borislav Petkov (AMD) <bp@alien8.de> Until all review comments have been addressed: https://lore.kernel.org/r/20240611105216.GAZmgsYC-J_yLfdupF@fat_crate.local
[AMD Official Use Only - AMD Internal Distribution Only] > -----Original Message----- > From: Borislav Petkov <bp@alien8.de> > Sent: Monday, June 17, 2024 4:39 PM > To: Yuan, Perry <Perry.Yuan@amd.com> > Cc: rafael.j.wysocki@intel.com; Limonciello, Mario > <Mario.Limonciello@amd.com>; viresh.kumar@linaro.org; Huang, Ray > <Ray.Huang@amd.com>; Shenoy, Gautham Ranjal > <gautham.shenoy@amd.com>; Deucher, Alexander > <Alexander.Deucher@amd.com>; Huang, Shimmer > <Shimmer.Huang@amd.com>; Du, Xiaojian <Xiaojian.Du@amd.com>; Meng, > Li (Jassmine) <Li.Meng@amd.com>; linux-pm@vger.kernel.org; linux- > kernel@vger.kernel.org > Subject: Re: [PATCH v4 08/11] x86/cpufeatures: Add feature bits for AMD > heterogeneous processor > > On Mon, Jun 17, 2024 at 02:59:10PM +0800, Perry Yuan wrote: > > CPUID leaf 0x80000026 advertises core types with different efficiency > > rankings > > > > Bit 30 indicates the heterogeneous core topology feature, if the bit > > set, it means not all instances at the current hierarchical level have > > the same core topology. > > > > For better utilization of feature words and help to identify core > > type, X86_FEATURE_HETERO_CORE_TOPOLOGY is added as a few scattered > feature bits. > > > > Reference: > > See the page 119 of PPR for AMD Family 19h Model 61h B1, docID 56713 > > > > Signed-off-by: Perry Yuan <perry.yuan@amd.com> > > --- > > arch/x86/include/asm/cpufeatures.h | 1 + > > arch/x86/kernel/cpu/scattered.c | 1 + > > 2 files changed, 2 insertions(+) > > > > diff --git a/arch/x86/include/asm/cpufeatures.h > > b/arch/x86/include/asm/cpufeatures.h > > index 6c128d463a14..eceaa0df0137 100644 > > --- a/arch/x86/include/asm/cpufeatures.h > > +++ b/arch/x86/include/asm/cpufeatures.h > > @@ -471,6 +471,7 @@ > > #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S > HW control enabled */ > > #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" > Clear branch history at vmexit using SW loop */ > > #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* "" AMD Fast > CPPC */ > > +#define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32+ 6) /* "" > Heterogeneous Core Topology */ > > > > /* > > * BUG word(s) > > diff --git a/arch/x86/kernel/cpu/scattered.c > > b/arch/x86/kernel/cpu/scattered.c index c84c30188fdf..6b3477503dd0 > > 100644 > > --- a/arch/x86/kernel/cpu/scattered.c > > +++ b/arch/x86/kernel/cpu/scattered.c > > @@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = { > > { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, > > { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, > > { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, > 0x80000022, 0 }, > > + { X86_FEATURE_HETERO_CORE_TOPOLOGY, CPUID_EAX, 30, > 0x80000026, 0 }, > > { 0, 0, 0, 0, 0 } > > }; > > > > -- > > Nacked-by: Borislav Petkov (AMD) <bp@alien8.de> > > Until all review comments have been addressed: > > https://lore.kernel.org/r/20240611105216.GAZmgsYC- > J_yLfdupF@fat_crate.local > > -- > Regards/Gruss, > Boris. > > https://people.kernel.org/tglx/notes-about-netiquette Boris, I Just accidentally missed the other comments, will address it in v5. Thanks for your review ~
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 6c128d463a14..eceaa0df0137 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -471,6 +471,7 @@ #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control enabled */ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */ #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* "" AMD Fast CPPC */ +#define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32+ 6) /* "" Heterogeneous Core Topology */ /* * BUG word(s) diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index c84c30188fdf..6b3477503dd0 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 }, + { X86_FEATURE_HETERO_CORE_TOPOLOGY, CPUID_EAX, 30, 0x80000026, 0 }, { 0, 0, 0, 0, 0 } };
CPUID leaf 0x80000026 advertises core types with different efficiency rankings Bit 30 indicates the heterogeneous core topology feature, if the bit set, it means not all instances at the current hierarchical level have the same core topology. For better utilization of feature words and help to identify core type, X86_FEATURE_HETERO_CORE_TOPOLOGY is added as a few scattered feature bits. Reference: See the page 119 of PPR for AMD Family 19h Model 61h B1, docID 56713 Signed-off-by: Perry Yuan <perry.yuan@amd.com> --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+)