| Message ID | 20231122043009.2741-13-laurent.pinchart+renesas@ideasonboard.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 51648e9605016b2b9d284e890b36bc27a71678dd |
| Delegated to: | Kieran Bingham |
| Headers | show |
| Series | media: renesas: vsp1: Conversion to subdev active state | expand |
Hi Laurent On Wed, Nov 22, 2023 at 06:30:02AM GMT, Laurent Pinchart wrote: > Some of the code that handles pipeline configuration assumes that > entities in a pipeline's entities list are sorted from sink to source. > To prepare for using that code with the DRM pipeline, insert the BRx > just before the WPF, and the RPFs at the head of the list. > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> With the meaning of pipe->output->entity.list_pipe clarified offline Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Thanks > --- > drivers/media/platform/renesas/vsp1/vsp1_drm.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/media/platform/renesas/vsp1/vsp1_drm.c b/drivers/media/platform/renesas/vsp1/vsp1_drm.c > index 1aa59a74672f..e44359b661b6 100644 > --- a/drivers/media/platform/renesas/vsp1/vsp1_drm.c > +++ b/drivers/media/platform/renesas/vsp1/vsp1_drm.c > @@ -317,7 +317,10 @@ static int vsp1_du_pipeline_setup_brx(struct vsp1_device *vsp1, > list_add_tail(&released_brx->list_pipe, > &pipe->entities); > > - /* Add the BRx to the pipeline. */ > + /* > + * Add the BRx to the pipeline, inserting it just before the > + * WPF. > + */ > dev_dbg(vsp1->dev, "%s: pipe %u: acquired %s\n", > __func__, pipe->lif->index, BRX_NAME(brx)); > > @@ -326,7 +329,8 @@ static int vsp1_du_pipeline_setup_brx(struct vsp1_device *vsp1, > pipe->brx->sink = &pipe->output->entity; > pipe->brx->sink_pad = 0; > > - list_add_tail(&pipe->brx->list_pipe, &pipe->entities); > + list_add_tail(&pipe->brx->list_pipe, > + &pipe->output->entity.list_pipe); > } > > /* > @@ -420,7 +424,7 @@ static int vsp1_du_pipeline_setup_inputs(struct vsp1_device *vsp1, > > if (!rpf->entity.pipe) { > rpf->entity.pipe = pipe; > - list_add_tail(&rpf->entity.list_pipe, &pipe->entities); > + list_add(&rpf->entity.list_pipe, &pipe->entities); > } > > brx->inputs[i].rpf = rpf; > -- > Regards, > > Laurent Pinchart > >
diff --git a/drivers/media/platform/renesas/vsp1/vsp1_drm.c b/drivers/media/platform/renesas/vsp1/vsp1_drm.c index 1aa59a74672f..e44359b661b6 100644 --- a/drivers/media/platform/renesas/vsp1/vsp1_drm.c +++ b/drivers/media/platform/renesas/vsp1/vsp1_drm.c @@ -317,7 +317,10 @@ static int vsp1_du_pipeline_setup_brx(struct vsp1_device *vsp1, list_add_tail(&released_brx->list_pipe, &pipe->entities); - /* Add the BRx to the pipeline. */ + /* + * Add the BRx to the pipeline, inserting it just before the + * WPF. + */ dev_dbg(vsp1->dev, "%s: pipe %u: acquired %s\n", __func__, pipe->lif->index, BRX_NAME(brx)); @@ -326,7 +329,8 @@ static int vsp1_du_pipeline_setup_brx(struct vsp1_device *vsp1, pipe->brx->sink = &pipe->output->entity; pipe->brx->sink_pad = 0; - list_add_tail(&pipe->brx->list_pipe, &pipe->entities); + list_add_tail(&pipe->brx->list_pipe, + &pipe->output->entity.list_pipe); } /* @@ -420,7 +424,7 @@ static int vsp1_du_pipeline_setup_inputs(struct vsp1_device *vsp1, if (!rpf->entity.pipe) { rpf->entity.pipe = pipe; - list_add_tail(&rpf->entity.list_pipe, &pipe->entities); + list_add(&rpf->entity.list_pipe, &pipe->entities); } brx->inputs[i].rpf = rpf;
Some of the code that handles pipeline configuration assumes that entities in a pipeline's entities list are sorted from sink to source. To prepare for using that code with the DRM pipeline, insert the BRx just before the WPF, and the RPFs at the head of the list. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> --- drivers/media/platform/renesas/vsp1/vsp1_drm.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)