diff mbox series

arm64: dts: ti: k3-j784s4-main: Add node for EHRPWMs

Message ID 20240603112938.2188510-1-u-kumar1@ti.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: ti: k3-j784s4-main: Add node for EHRPWMs | expand

Commit Message

Kumar, Udit June 3, 2024, 11:29 a.m. UTC 
From: Dasnavis Sabiya <sabiya.d@ti.com>

Add dts nodes for 6 EHRPWM instances on SoC.

Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 66 ++++++++++++++++++++++
 1 file changed, 66 insertions(+)

Comments

Vignesh Raghavendra June 21, 2024, 3:21 p.m. UTC | #1 
On 03/06/24 16:59, Udit Kumar wrote:
> From: Dasnavis Sabiya <sabiya.d@ti.com>
> 
> Add dts nodes for 6 EHRPWM instances on SoC.
> 
> Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
> Signed-off-by: Udit Kumar <u-kumar1@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 66 ++++++++++++++++++++++
>  1 file changed, 66 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 6a4554c6c9c1..f6fc2ce55f9b 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -75,6 +75,72 @@ serdes_ln_ctrl: mux-controller@4080 {
>  				      <J784S4_SERDES4_LANE2_EDP_LANE2>,
>  				      <J784S4_SERDES4_LANE3_EDP_LANE3>;
>  		};
> +
> +		ehrpwm_tbclk: clock-controller@4140 {
> +			compatible = "ti,am654-ehrpwm-tbclk";
> +			reg = <0x4140 0x18>;
> +			#clock-cells = <1>;
> +		};
> +	};
> +
> +	main_ehrpwm0: pwm@3000000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;


This needs to be ordered as per

https://www.kernel.org/doc/Documentation/devicetree/bindings/dts-coding-style.rst
(compatible is immediately followed by reg)

Will fix all the nodes locally before merging

> +		reg = <0x00 0x3000000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 0>, <&k3_clks 219 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm1: pwm@3010000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3010000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 220 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm2: pwm@3020000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3020000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 221 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm3: pwm@3030000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3030000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 3>, <&k3_clks 222 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm4: pwm@3040000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3040000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 4>, <&k3_clks 223 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	main_ehrpwm5: pwm@3050000 {
> +		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> +		#pwm-cells = <3>;
> +		reg = <0x00 0x3050000 0x00 0x100>;
> +		clocks = <&ehrpwm_tbclk 5>, <&k3_clks 224 0>;
> +		clock-names = "tbclk", "fck";
> +		power-domains = <&k3_pds 224 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
>  	};
>  
>  	gic500: interrupt-controller@1800000 {
Vignesh Raghavendra June 22, 2024, 6:17 a.m. UTC | #2 
Hi Udit Kumar,

On Mon, 03 Jun 2024 16:59:38 +0530, Udit Kumar wrote:
> Add dts nodes for 6 EHRPWM instances on SoC.
> 
> 

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/1] arm64: dts: ti: k3-j784s4-main: Add node for EHRPWMs
      commit: f53f477bfcb8aa7490b3bd3030e3bef1b95dbdce

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 6a4554c6c9c1..f6fc2ce55f9b 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -75,6 +75,72 @@  serdes_ln_ctrl: mux-controller@4080 {
 				      <J784S4_SERDES4_LANE2_EDP_LANE2>,
 				      <J784S4_SERDES4_LANE3_EDP_LANE3>;
 		};
+
+		ehrpwm_tbclk: clock-controller@4140 {
+			compatible = "ti,am654-ehrpwm-tbclk";
+			reg = <0x4140 0x18>;
+			#clock-cells = <1>;
+		};
+	};
+
+	main_ehrpwm0: pwm@3000000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3000000 0x00 0x100>;
+		clocks = <&ehrpwm_tbclk 0>, <&k3_clks 219 0>;
+		clock-names = "tbclk", "fck";
+		power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	main_ehrpwm1: pwm@3010000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3010000 0x00 0x100>;
+		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 220 0>;
+		clock-names = "tbclk", "fck";
+		power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	main_ehrpwm2: pwm@3020000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3020000 0x00 0x100>;
+		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 221 0>;
+		clock-names = "tbclk", "fck";
+		power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	main_ehrpwm3: pwm@3030000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3030000 0x00 0x100>;
+		clocks = <&ehrpwm_tbclk 3>, <&k3_clks 222 0>;
+		clock-names = "tbclk", "fck";
+		power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	main_ehrpwm4: pwm@3040000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3040000 0x00 0x100>;
+		clocks = <&ehrpwm_tbclk 4>, <&k3_clks 223 0>;
+		clock-names = "tbclk", "fck";
+		power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	main_ehrpwm5: pwm@3050000 {
+		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x3050000 0x00 0x100>;
+		clocks = <&ehrpwm_tbclk 5>, <&k3_clks 224 0>;
+		clock-names = "tbclk", "fck";
+		power-domains = <&k3_pds 224 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
 	};
 
 	gic500: interrupt-controller@1800000 {