diff mbox series

reset: zynqmp: allow building under COMPILE_TEST

Message ID 20240621-reset-compile-zynqmp-v1-1-ede43ab18101@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series reset: zynqmp: allow building under COMPILE_TEST | expand

Commit Message

Philipp Zabel June 21, 2024, 3:24 p.m. UTC 
The ZynqMP reset driver can be compiled without ARCH_ZYNQMP being
enabled. Allow it to be built under COMPILE_TEST.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/reset/Kconfig  | 6 ++++++
 drivers/reset/Makefile | 2 +-
 2 files changed, 7 insertions(+), 1 deletion(-)


---
base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
change-id: 20240621-reset-compile-zynqmp-6e6bedc658af

Best regards,

Comments

Michal Simek June 24, 2024, 11:27 a.m. UTC | #1 
On 6/21/24 17:24, Philipp Zabel wrote:
> The ZynqMP reset driver can be compiled without ARCH_ZYNQMP being
> enabled. Allow it to be built under COMPILE_TEST.
> 
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> ---
>   drivers/reset/Kconfig  | 6 ++++++
>   drivers/reset/Makefile | 2 +-
>   2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 7112f5932609..9b914f8818ef 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -328,6 +328,12 @@ config RESET_ZYNQ
>   	help
>   	  This enables the reset controller driver for Xilinx Zynq SoCs.
>   
> +config RESET_ZYNQMP
> +	bool "ZYNQMP Reset Driver" if COMPILE_TEST
> +	default ARCH_ZYNQMP
> +	help
> +	  This enables the reset controller driver for Xilinx ZynqMP SoCs.
> +
>   source "drivers/reset/starfive/Kconfig"
>   source "drivers/reset/sti/Kconfig"
>   source "drivers/reset/hisilicon/Kconfig"
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index fd8b49fa46fc..544ae3488e3f 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -41,4 +41,4 @@ obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o
>   obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
>   obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o
>   obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
> -obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o
> +obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o
> 
> ---
> base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
> change-id: 20240621-reset-compile-zynqmp-6e6bedc658af
> 
> Best regards,

Make sense.
Acked-by: Michal Simek <michal.simek@amd.com>

Thanks,
Michal
diff mbox series

Patch

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 7112f5932609..9b914f8818ef 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -328,6 +328,12 @@  config RESET_ZYNQ
 	help
 	  This enables the reset controller driver for Xilinx Zynq SoCs.
 
+config RESET_ZYNQMP
+	bool "ZYNQMP Reset Driver" if COMPILE_TEST
+	default ARCH_ZYNQMP
+	help
+	  This enables the reset controller driver for Xilinx ZynqMP SoCs.
+
 source "drivers/reset/starfive/Kconfig"
 source "drivers/reset/sti/Kconfig"
 source "drivers/reset/hisilicon/Kconfig"
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index fd8b49fa46fc..544ae3488e3f 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -41,4 +41,4 @@  obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o
 obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
 obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o
 obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
-obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o
+obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o