| Message ID | 20240628140104.551760-4-amadeus@jmu.edu.cn (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/5] arm64: dts: rockchip: fix regulator and supply for Lunzn Fastrhino R6xS | expand |
Am Freitag, 28. Juni 2024, 16:01:03 CEST schrieb Chukun Pan: > Replace the deprecated snps,reset-xxx bindings to the generic Ethernet PHY > reset GPIO bindings. Also fixed the PHY address and reset GPIOs (does not > match the corresponding pinctrl). Since we use rgmii-id as the phy mode, > remove the useless tx_delay and rx_delay. Please split this commit into multiple ones. When need to "list" changes in your commit message, it is often a good indicator for needing to split a change. > Fixes: b9f8ca655d80 ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S") > Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> > --- > .../dts/rockchip/rk3568-fastrhino-r68s.dts | 26 +++++++------------ > 1 file changed, 10 insertions(+), 16 deletions(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts > index a3339186e89c..d27eb37b5b35 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts > @@ -39,12 +39,6 @@ &gmac0_tx_bus2 > &gmac0_rx_bus2 > &gmac0_rgmii_clk > &gmac0_rgmii_bus>; > - snps,reset-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; > - snps,reset-active-low; > - /* Reset time is 15ms, 50ms for rtl8211f */ > - snps,reset-delays-us = <0 15000 50000>; > - tx_delay = <0x3c>; > - rx_delay = <0x2f>; > status = "okay"; > }; > > @@ -61,30 +55,30 @@ &gmac1m1_tx_bus2 > &gmac1m1_rx_bus2 > &gmac1m1_rgmii_clk > &gmac1m1_rgmii_bus>; > - snps,reset-gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>; > - snps,reset-active-low; > - /* Reset time is 15ms, 50ms for rtl8211f */ > - snps,reset-delays-us = <0 15000 50000>; > - tx_delay = <0x4f>; > - rx_delay = <0x26>; > status = "okay"; > }; > > &mdio0 { > - rgmii_phy0: ethernet-phy@0 { > + rgmii_phy0: ethernet-phy@1 { > compatible = "ethernet-phy-ieee802.3-c22"; > - reg = <0>; > + reg = <0x1>; > pinctrl-0 = <ð_phy0_reset_pin>; > pinctrl-names = "default"; > + reset-assert-us = <20000>; > + reset-deassert-us = <100000>; > + reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; > }; > }; > > &mdio1 { > - rgmii_phy1: ethernet-phy@0 { > + rgmii_phy1: ethernet-phy@1 { > compatible = "ethernet-phy-ieee802.3-c22"; > - reg = <0>; > + reg = <0x1>; > pinctrl-0 = <ð_phy1_reset_pin>; > pinctrl-names = "default"; > + reset-assert-us = <20000>; > + reset-deassert-us = <100000>; > + reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; > }; > }; > >
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts index a3339186e89c..d27eb37b5b35 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts @@ -39,12 +39,6 @@ &gmac0_tx_bus2 &gmac0_rx_bus2 &gmac0_rgmii_clk &gmac0_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 15ms, 50ms for rtl8211f */ - snps,reset-delays-us = <0 15000 50000>; - tx_delay = <0x3c>; - rx_delay = <0x2f>; status = "okay"; }; @@ -61,30 +55,30 @@ &gmac1m1_tx_bus2 &gmac1m1_rx_bus2 &gmac1m1_rgmii_clk &gmac1m1_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 15ms, 50ms for rtl8211f */ - snps,reset-delays-us = <0 15000 50000>; - tx_delay = <0x4f>; - rx_delay = <0x26>; status = "okay"; }; &mdio0 { - rgmii_phy0: ethernet-phy@0 { + rgmii_phy0: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; + reg = <0x1>; pinctrl-0 = <ð_phy0_reset_pin>; pinctrl-names = "default"; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; }; }; &mdio1 { - rgmii_phy1: ethernet-phy@0 { + rgmii_phy1: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; + reg = <0x1>; pinctrl-0 = <ð_phy1_reset_pin>; pinctrl-names = "default"; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; }; };
Replace the deprecated snps,reset-xxx bindings to the generic Ethernet PHY reset GPIO bindings. Also fixed the PHY address and reset GPIOs (does not match the corresponding pinctrl). Since we use rgmii-id as the phy mode, remove the useless tx_delay and rx_delay. Fixes: b9f8ca655d80 ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S") Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> --- .../dts/rockchip/rk3568-fastrhino-r68s.dts | 26 +++++++------------ 1 file changed, 10 insertions(+), 16 deletions(-)