Message ID | e5477d05-93e0-4268-90ca-581e3f492b4e@intel.com |
---|---|
State | Not Applicable |
Headers | show |
Series | [GIT,PULL] Compute Express Link (CXL) Fixes for 6.10-rc7 | expand |
On Mon, 1 Jul 2024 at 10:53, Dave Jiang <dave.jiang@intel.com> wrote: > > A fix to add proper checking for CXL region interleave capability during assembly. I pulled this, but this should not have been a post-rc6 "fix". That code is absolutely new development. Any interleave mis-match has never worked in the past afaik, and this really looks like a new feature to me. So I think this should have been a "next merge window development" thing. Fixes are for things that have broken or cause acute problems. Not for "this never worked and nobody even reported it". Linus
The pull request you sent on Mon, 1 Jul 2024 10:53:44 -0700:
> git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-fixes-6.10-rc7
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/73e931504f8e0d42978bfcda37b323dbbd1afc08
Thank you!
On 7/1/24 1:12 PM, Linus Torvalds wrote: > On Mon, 1 Jul 2024 at 10:53, Dave Jiang <dave.jiang@intel.com> wrote: >> >> A fix to add proper checking for CXL region interleave capability during assembly. > > I pulled this, but this should not have been a post-rc6 "fix". Thank you > > That code is absolutely new development. Any interleave mis-match has > never worked in the past afaik, and this really looks like a new > feature to me. > > So I think this should have been a "next merge window development" > thing. Fixes are for things that have broken or cause acute problems. > Not for "this never worked and nobody even reported it". I contemplated whether this is a fix or should be left to the next merge window. Next time in doubt, I'll leave it to the next merge window. Sorry about that. > > Linus