| Message ID | 20240503130147.1154804-6-joey.gouly@arm.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: Permission Overlay Extension | expand |
On Fri, May 03, 2024 at 02:01:23PM +0100, Joey Gouly wrote: > This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE > as the boot CPU will enable POE if it has it, so secondary CPUs must also > have this feature. > > Signed-off-by: Joey Gouly <joey.gouly@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> Adding some acks otherwise I'll forget what I reviewed. Acked-by: Catalin Marinas <catalin.marinas@arm.com>
On Fri, May 03, 2024 at 02:01:23PM +0100, Joey Gouly wrote: > This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE > as the boot CPU will enable POE if it has it, so secondary CPUs must also > have this feature. > > Signed-off-by: Joey Gouly <joey.gouly@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
On Fri, Jun 21, 2024 at 06:01:52PM +0100, Catalin Marinas wrote: > On Fri, May 03, 2024 at 02:01:23PM +0100, Joey Gouly wrote: > > This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE > > as the boot CPU will enable POE if it has it, so secondary CPUs must also > > have this feature. > > > > Signed-off-by: Joey Gouly <joey.gouly@arm.com> > > Cc: Catalin Marinas <catalin.marinas@arm.com> > > Cc: Will Deacon <will@kernel.org> > > Acked-by: Catalin Marinas <catalin.marinas@arm.com> One ack is sufficient, ignore this one ;)
On 5/3/24 18:31, Joey Gouly wrote: > This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE > as the boot CPU will enable POE if it has it, so secondary CPUs must also > have this feature. > > Signed-off-by: Joey Gouly <joey.gouly@arm.com> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> > --- > arch/arm64/kernel/cpufeature.c | 9 +++++++++ > arch/arm64/tools/cpucaps | 1 + > 2 files changed, 10 insertions(+) > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 56583677c1f2..2f3c2346e156 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -2861,6 +2861,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > .matches = has_nv1, > ARM64_CPUID_FIELDS_NEG(ID_AA64MMFR4_EL1, E2H0, NI_NV1) > }, > +#ifdef CONFIG_ARM64_POE > + { > + .desc = "Stage-1 Permission Overlay Extension (S1POE)", > + .capability = ARM64_HAS_S1POE, > + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, > + .matches = has_cpuid_feature, > + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) > + }, > +#endif > {}, > }; > > diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps > index 62b2838a231a..45f558fc0d87 100644 > --- a/arch/arm64/tools/cpucaps > +++ b/arch/arm64/tools/cpucaps > @@ -45,6 +45,7 @@ HAS_MOPS > HAS_NESTED_VIRT > HAS_PAN > HAS_S1PIE > +HAS_S1POE > HAS_RAS_EXTN > HAS_RNG > HAS_SB Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 56583677c1f2..2f3c2346e156 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2861,6 +2861,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = has_nv1, ARM64_CPUID_FIELDS_NEG(ID_AA64MMFR4_EL1, E2H0, NI_NV1) }, +#ifdef CONFIG_ARM64_POE + { + .desc = "Stage-1 Permission Overlay Extension (S1POE)", + .capability = ARM64_HAS_S1POE, + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) + }, +#endif {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 62b2838a231a..45f558fc0d87 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -45,6 +45,7 @@ HAS_MOPS HAS_NESTED_VIRT HAS_PAN HAS_S1PIE +HAS_S1POE HAS_RAS_EXTN HAS_RNG HAS_SB
This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE as the boot CPU will enable POE if it has it, so secondary CPUs must also have this feature. Signed-off-by: Joey Gouly <joey.gouly@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> --- arch/arm64/kernel/cpufeature.c | 9 +++++++++ arch/arm64/tools/cpucaps | 1 + 2 files changed, 10 insertions(+)