Message ID | 20240709032651.1824185-3-ankit.k.nautiyal@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Use VRR timing generator for fixed refresh rate modes | expand |
> -----Original Message----- > From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com> > Sent: Tuesday, July 9, 2024 8:57 AM > To: intel-gfx@lists.freedesktop.org > Cc: jani.nikula@linux.intel.com; ville.syrjala@linux.intel.com; Golani, > Mitulkumar Ajitkumar <mitulkumar.ajitkumar.golani@intel.com> > Subject: [PATCH 02/10] drm/i915/display: Add member fixed_rr to denote Fixed > refresh rate with VRRTG > > Add fixed_rr member to struct vrr to represent the case where a fixed refresh > rate with VRR timing generator is required. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 4 +++- > drivers/gpu/drm/i915/display/intel_display_types.h | 2 +- > drivers/gpu/drm/i915/display/intel_vrr.c | 3 +++ > 3 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index c2c388212e2e..85695dc2b2e5 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -1004,7 +1004,8 @@ static bool vrr_params_changed(const struct > intel_crtc_state *old_crtc_state, > old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin || > old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax || > old_crtc_state->vrr.guardband != new_crtc_state- > >vrr.guardband || > - old_crtc_state->vrr.pipeline_full != new_crtc_state- > >vrr.pipeline_full; > + old_crtc_state->vrr.pipeline_full != new_crtc_state- > >vrr.pipeline_full || > + old_crtc_state->vrr.fixed_rr != new_crtc_state->vrr.fixed_rr; > } > > static bool cmrr_params_changed(const struct intel_crtc_state > *old_crtc_state, @@ -5469,6 +5470,7 @@ intel_pipe_config_compare(const > struct intel_crtc_state *current_config, > > if (!fastset) { > PIPE_CONF_CHECK_BOOL(vrr.enable); > + PIPE_CONF_CHECK_BOOL(vrr.fixed_rr); > PIPE_CONF_CHECK_I(vrr.vmin); > PIPE_CONF_CHECK_I(vrr.vmax); > PIPE_CONF_CHECK_I(vrr.flipline); > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index 8713835e2307..875370219892 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1407,7 +1407,7 @@ struct intel_crtc_state { > > /* Variable Refresh Rate state */ > struct { > - bool enable, in_range; > + bool enable, in_range, fixed_rr; > u8 pipeline_full; > u16 flipline, vmin, vmax, guardband; > u32 vsync_end, vsync_start; > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c > b/drivers/gpu/drm/i915/display/intel_vrr.c > index 5a0da64c7db3..24568dae717a 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > @@ -421,6 +421,9 @@ void intel_vrr_get_config(struct intel_crtc_state > *crtc_state) > > TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1; > crtc_state->vrr.vmin = intel_de_read(dev_priv, > > TRANS_VRR_VMIN(dev_priv, cpu_transcoder)) + 1; > + if (crtc_state->vrr.vmax == crtc_state->vrr.flipline && > + crtc_state->vrr.vmin == crtc_state->vrr.flipline) > + crtc_state->vrr.fixed_rr = true; > } > > if (crtc_state->vrr.enable) { > -- > 2.40.1 For CMRR case, when vmax=vmin=flipline is there, to avoid any state mismatch, should we consider moving this get_config along with compute part ? Regards, Mitul
On 7/16/2024 9:33 AM, Golani, Mitulkumar Ajitkumar wrote: > >> -----Original Message----- >> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com> >> Sent: Tuesday, July 9, 2024 8:57 AM >> To: intel-gfx@lists.freedesktop.org >> Cc: jani.nikula@linux.intel.com; ville.syrjala@linux.intel.com; Golani, >> Mitulkumar Ajitkumar <mitulkumar.ajitkumar.golani@intel.com> >> Subject: [PATCH 02/10] drm/i915/display: Add member fixed_rr to denote Fixed >> refresh rate with VRRTG >> >> Add fixed_rr member to struct vrr to represent the case where a fixed refresh >> rate with VRR timing generator is required. >> >> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> >> --- >> drivers/gpu/drm/i915/display/intel_display.c | 4 +++- >> drivers/gpu/drm/i915/display/intel_display_types.h | 2 +- >> drivers/gpu/drm/i915/display/intel_vrr.c | 3 +++ >> 3 files changed, 7 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c >> b/drivers/gpu/drm/i915/display/intel_display.c >> index c2c388212e2e..85695dc2b2e5 100644 >> --- a/drivers/gpu/drm/i915/display/intel_display.c >> +++ b/drivers/gpu/drm/i915/display/intel_display.c >> @@ -1004,7 +1004,8 @@ static bool vrr_params_changed(const struct >> intel_crtc_state *old_crtc_state, >> old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin || >> old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax || >> old_crtc_state->vrr.guardband != new_crtc_state- >>> vrr.guardband || >> - old_crtc_state->vrr.pipeline_full != new_crtc_state- >>> vrr.pipeline_full; >> + old_crtc_state->vrr.pipeline_full != new_crtc_state- >>> vrr.pipeline_full || >> + old_crtc_state->vrr.fixed_rr != new_crtc_state->vrr.fixed_rr; >> } >> >> static bool cmrr_params_changed(const struct intel_crtc_state >> *old_crtc_state, @@ -5469,6 +5470,7 @@ intel_pipe_config_compare(const >> struct intel_crtc_state *current_config, >> >> if (!fastset) { >> PIPE_CONF_CHECK_BOOL(vrr.enable); >> + PIPE_CONF_CHECK_BOOL(vrr.fixed_rr); >> PIPE_CONF_CHECK_I(vrr.vmin); >> PIPE_CONF_CHECK_I(vrr.vmax); >> PIPE_CONF_CHECK_I(vrr.flipline); >> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h >> b/drivers/gpu/drm/i915/display/intel_display_types.h >> index 8713835e2307..875370219892 100644 >> --- a/drivers/gpu/drm/i915/display/intel_display_types.h >> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h >> @@ -1407,7 +1407,7 @@ struct intel_crtc_state { >> >> /* Variable Refresh Rate state */ >> struct { >> - bool enable, in_range; >> + bool enable, in_range, fixed_rr; >> u8 pipeline_full; >> u16 flipline, vmin, vmax, guardband; >> u32 vsync_end, vsync_start; >> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c >> b/drivers/gpu/drm/i915/display/intel_vrr.c >> index 5a0da64c7db3..24568dae717a 100644 >> --- a/drivers/gpu/drm/i915/display/intel_vrr.c >> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c >> @@ -421,6 +421,9 @@ void intel_vrr_get_config(struct intel_crtc_state >> *crtc_state) >> >> TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1; >> crtc_state->vrr.vmin = intel_de_read(dev_priv, >> >> TRANS_VRR_VMIN(dev_priv, cpu_transcoder)) + 1; >> + if (crtc_state->vrr.vmax == crtc_state->vrr.flipline && >> + crtc_state->vrr.vmin == crtc_state->vrr.flipline) >> + crtc_state->vrr.fixed_rr = true; >> } >> >> if (crtc_state->vrr.enable) { >> -- >> 2.40.1 > For CMRR case, when vmax=vmin=flipline is there, to avoid any state mismatch, should we consider moving this get_config along with compute part ? Makes sense, I missed about the CMRR case. I will add this as part of last patch. Regards, Ankit > > Regards, > Mitul >
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c2c388212e2e..85695dc2b2e5 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1004,7 +1004,8 @@ static bool vrr_params_changed(const struct intel_crtc_state *old_crtc_state, old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin || old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax || old_crtc_state->vrr.guardband != new_crtc_state->vrr.guardband || - old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full; + old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full || + old_crtc_state->vrr.fixed_rr != new_crtc_state->vrr.fixed_rr; } static bool cmrr_params_changed(const struct intel_crtc_state *old_crtc_state, @@ -5469,6 +5470,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, if (!fastset) { PIPE_CONF_CHECK_BOOL(vrr.enable); + PIPE_CONF_CHECK_BOOL(vrr.fixed_rr); PIPE_CONF_CHECK_I(vrr.vmin); PIPE_CONF_CHECK_I(vrr.vmax); PIPE_CONF_CHECK_I(vrr.flipline); diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 8713835e2307..875370219892 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1407,7 +1407,7 @@ struct intel_crtc_state { /* Variable Refresh Rate state */ struct { - bool enable, in_range; + bool enable, in_range, fixed_rr; u8 pipeline_full; u16 flipline, vmin, vmax, guardband; u32 vsync_end, vsync_start; diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 5a0da64c7db3..24568dae717a 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -421,6 +421,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1; crtc_state->vrr.vmin = intel_de_read(dev_priv, TRANS_VRR_VMIN(dev_priv, cpu_transcoder)) + 1; + if (crtc_state->vrr.vmax == crtc_state->vrr.flipline && + crtc_state->vrr.vmin == crtc_state->vrr.flipline) + crtc_state->vrr.fixed_rr = true; } if (crtc_state->vrr.enable) {
Add fixed_rr member to struct vrr to represent the case where a fixed refresh rate with VRR timing generator is required. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 +++- drivers/gpu/drm/i915/display/intel_display_types.h | 2 +- drivers/gpu/drm/i915/display/intel_vrr.c | 3 +++ 3 files changed, 7 insertions(+), 2 deletions(-)